Re: [PATCH 2/2] perf, amd: support for AMD NB and L2I "uncore" counters.

[Peter Zijlstra <a.p.zijlstra@chello.nl>]

On Mon, 2013-04-15 at 12:21 -0500, Jacob Shin wrote:
> Add support for AMD Family 15h [and above] northbridge performance
> counters. MSRs 0xc0010240 ~ 0xc0010247 are shared across all cores
> that share a common northbridge.
> 
> Add support for AMD Family 16h L2 performance counters. MSRs
> 0xc0010230 ~ 0xc0010237 are shared across all cores that share a
> common L2 cache.
> 
> We do not enable counter overflow interrupts. Sampling mode and
> per-thread events are not supported.


Nice!

There's one crucial thing missing though.. The Intel uncore driver
explicitly maps all events of cpus that are of the same uncore to a
single cpu and migrates the events to another cpu (if any is available)
when that cpu goes down.

The advantage of keeping all the events on the same cpu is that we
don't need to consider shared resources between cpus of an uncore
group.

That way things like event rotation on overcommit also trivially works
right.

I appreciate the intel uncore driver might be a tad hard to read -- its
somewhat unwieldy. But it basically sets event->cpu on
pmu::event_init() to whatever cpu is selected to represent the group,
and then calls perf_pmu_migrate_context() from a hotplug notifier.