[PATCH 3/3] ARM: u8540: DT: Set pinctrl mapping to i2c0,1,2,4 & 5

[Gabriel Fernandez <gabriel.fernandez.st@gmail.com>]

From: Gabriel Fernandez <gabriel.fernandez@st.com>

This patch configures pin map in device tree of i2c0,
1,2,4 & 5 for ccu8540 board.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
---
 arch/arm/boot/dts/ccu8540-pinctrl.dtsi | 115 +++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/ccu8540.dts          |  30 +++++++++
 2 files changed, 145 insertions(+)

diff --git a/arch/arm/boot/dts/ccu8540-pinctrl.dtsi b/arch/arm/boot/dts/ccu8540-pinctrl.dtsi
index 26e718b..57e8165 100644
--- a/arch/arm/boot/dts/ccu8540-pinctrl.dtsi
+++ b/arch/arm/boot/dts/ccu8540-pinctrl.dtsi
@@ -74,4 +74,119 @@
 			};
 		};
 	};
+
+	i2c0 {
+		i2c0_default_mux: i2c_mux {
+			default_mux {
+				ste,function = "i2c0";
+				ste,pins = "i2c0_a_1";
+			};
+		};
+
+		i2c0_default_mode: i2c_default {
+			default_cfg1 {
+				ste,pins = "GPIO147", "GPIO148";
+				ste,config = <&in_pu>;
+			};
+		};
+
+		i2c0_sleep_mode: i2c_sleep {
+			sleep_cfg1 {
+				ste,pins = "GPIO147", "GPIO148";
+				ste,config = <&slpm_in_pu>;
+			};
+		};
+	};
+
+	i2c1 {
+		i2c1_default_mux: i2c_mux {
+			default_mux {
+				ste,function = "i2c1";
+				ste,pins = "i2c1_b_2";
+			};
+		};
+
+		i2c1_default_mode: i2c_default {
+			default_cfg1 {
+				ste,pins = "GPIO16", "GPIO17";
+				ste,config = <&in_pu>;
+			};
+		};
+
+		i2c1_sleep_mode: i2c_sleep {
+			sleep_cfg1 {
+				ste,pins = "GPIO16", "GPIO17";
+				ste,config = <&slpm_in_pu>;
+			};
+		};
+	};
+
+	i2c2 {
+		i2c2_default_mux: i2c_mux {
+			default_mux {
+				ste,function = "i2c2";
+				ste,pins = "i2c2_b_2";
+			};
+		};
+
+		i2c2_default_mode: i2c_default {
+			default_cfg1 {
+				ste,pins = "GPIO10", "GPIO11";
+				ste,config = <&in_pu>;
+			};
+		};
+
+		i2c2_sleep_mode: i2c_sleep {
+			sleep_cfg1 {
+				ste,pins = "GPIO11", "GPIO11";
+				ste,config = <&slpm_in_pu>;
+			};
+		};
+	};
+
+	i2c4 {
+		i2c4_default_mux: i2c_mux {
+			default_mux {
+				ste,function = "i2c4";
+				ste,pins = "i2c4_b_2";
+			};
+		};
+
+		i2c4_default_mode: i2c_default {
+			default_cfg1 {
+				ste,pins = "GPIO122", "GPIO123";
+				ste,config = <&in_pu>;
+			};
+		};
+
+		i2c4_sleep_mode: i2c_sleep {
+			sleep_cfg1 {
+				ste,pins = "GPIO122", "GPIO123";
+				ste,config = <&slpm_in_pu>;
+			};
+		};
+	};
+
+	i2c5 {
+		i2c5_default_mux: i2c_mux {
+			default_mux {
+				ste,function = "i2c5";
+				ste,pins = "i2c5_c_2";
+			};
+		};
+
+		i2c5_default_mode: i2c_default {
+			default_cfg1 {
+				ste,pins = "GPIO118", "GPIO119";
+				ste,config = <&in_pu>;
+			};
+		};
+
+		i2c5_sleep_mode: i2c_sleep {
+			sleep_cfg1 {
+				ste,pins = "GPIO118", "GPIO119";
+				ste,config = <&slpm_in_pu>;
+			};
+		};
+	};
 };
diff --git a/arch/arm/boot/dts/ccu8540.dts b/arch/arm/boot/dts/ccu8540.dts
index 4f93795..3e7142b 100644
--- a/arch/arm/boot/dts/ccu8540.dts
+++ b/arch/arm/boot/dts/ccu8540.dts
@@ -44,5 +44,35 @@
 			pinctrl-1 = <&uart2_sleep_mode>;
 			status = "okay";
 		};
+
+		i2c0: i2c@80004000 {
+			pinctrl-names = "default","sleep";
+			pinctrl-0 = <&i2c0_default_mux>,<&i2c0_default_mode>;
+			pinctrl-1 = <&i2c0_sleep_mode>;
+		};
+
+		i2c1: i2c@80122000 {
+			pinctrl-names = "default","sleep";
+			pinctrl-0 = <&i2c1_default_mux>,<&i2c1_default_mode>;
+			pinctrl-1 = <&i2c1_sleep_mode>;
+		};
+
+		i2c2: i2c@80128000 {
+			pinctrl-names = "default","sleep";
+			pinctrl-0 = <&i2c2_default_mux>,<&i2c2_default_mode>;
+			pinctrl-1 = <&i2c2_sleep_mode>;
+		};
+
+		i2c4: i2c@8012a000 {
+			pinctrl-names = "default","sleep";
+			pinctrl-0 = <&i2c4_default_mux>,<&i2c4_default_mode>;
+			pinctrl-1 = <&i2c4_sleep_mode>;
+		};
+
+		i2c5: i2c@80001000 {
+			pinctrl-names = "default","sleep";
+			pinctrl-0 = <&i2c5_default_mux>,<&i2c5_default_mode>;
+			pinctrl-1 = <&i2c5_sleep_mode>;
+		};
 	};
 };
-- 
1.8.1.1