From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755647Ab3IPNoU (ORCPT ); Mon, 16 Sep 2013 09:44:20 -0400 Received: from mail-ea0-f182.google.com ([209.85.215.182]:48442 "EHLO mail-ea0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755041Ab3IPNoS (ORCPT ); Mon, 16 Sep 2013 09:44:18 -0400 From: Iker Pedrosa To: pavel@ucw.cz Cc: gregkh@linuxfoundation.org, ikerpedrosam@gmail.com, harsh1kumar@gmail.com, dan.carpenter@oracle.com, mujeeb.adil@gmail.com, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 11/24] Staging: winbond: reg: third of the patches that fixes lines over 80 characters Date: Mon, 16 Sep 2013 15:43:31 +0200 Message-Id: <1379339024-12157-12-git-send-email-ikerpedrosam@gmail.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1379339024-12157-1-git-send-email-ikerpedrosam@gmail.com> References: <1379339024-12157-1-git-send-email-ikerpedrosam@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Third of the patches that fixes the lines over 80 characters in reg.c Signed-off-by: Iker Pedrosa --- drivers/staging/winbond/reg.c | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/drivers/staging/winbond/reg.c b/drivers/staging/winbond/reg.c index a65e8ce..6aae4da 100644 --- a/drivers/staging/winbond/reg.c +++ b/drivers/staging/winbond/reg.c @@ -1083,15 +1083,18 @@ void RFSynthesizer_initial(struct hw_data *pHwData) Wb35Reg_WriteSync(pHwData, 0x1050, pHwData->reg.BB50); usleep(5000); - ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse((0x0F << 20) | 0xF01B0, 20); + ltmp = (1 << 31) | (0 << 30) | (20 << 24) + | BitReverse((0x0F << 20) | 0xF01B0, 20); Wb35Reg_WriteSync(pHwData, 0x0864, ltmp); usleep(5000); - ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse((0x0F << 20) | 0xF01E0, 20); + ltmp = (1 << 31) | (0 << 30) | (20 << 24) + | BitReverse((0x0F << 20) | 0xF01E0, 20); Wb35Reg_WriteSync(pHwData, 0x0864, ltmp); usleep(5000); - ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse((0x0F << 20) | 0xF01A0, 20); + ltmp = (1 << 31) | (0 << 30) | (20 << 24) + | BitReverse((0x0F << 20) | 0xF01A0, 20); Wb35Reg_WriteSync(pHwData, 0x0864, ltmp); Wb35Reg_WriteSync(pHwData, 0x105c, pHwData->reg.BB5C); @@ -1149,30 +1152,37 @@ void RFSynthesizer_initial(struct hw_data *pHwData) /* ----- Calibration (1). VCO frequency calibration */ /* Calibration (1a.0). Synthesizer reset */ - ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x0F<<24) | 0x00101E, 24); + ltmp = (1 << 31) | (0 << 30) | (24 << 24) + | BitReverse((0x0F<<24) | 0x00101E, 24); Wb35Reg_WriteSync(pHwData, 0x0864, ltmp); usleep(5000); /* Calibration (1a). VCO frequency calibration mode ; waiting 2msec VCO calibration time */ - ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFE69c0, 24); + ltmp = (1 << 31) | (0 << 30) | (24 << 24) + | BitReverse((0x00<<24) | 0xFE69c0, 24); Wb35Reg_WriteSync(pHwData, 0x0864, ltmp); usleep(2000); /* ----- Calibration (2). TX baseband Gm-C filter auto-tuning */ /* Calibration (2a). turn off ENCAL signal */ - ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xF8EBC0, 24); + ltmp = (1 << 31) | (0 << 30) | (24 << 24) + | BitReverse((0x00<<24) | 0xF8EBC0, 24); Wb35Reg_WriteSync(pHwData, 0x0864, ltmp); /* Calibration (2b.0). TX filter auto-tuning BW: TFLBW=101 (TC5376A default) */ - ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x07<<24) | 0x0C68CE, 24); + ltmp = (1 << 31) | (0 << 30) | (24 << 24) + | BitReverse((0x07<<24) | 0x0C68CE, 24); Wb35Reg_WriteSync(pHwData, 0x0864, ltmp); /* Calibration (2b). send TX reset signal */ - ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x0F<<24) | 0x00201E, 24); + ltmp = (1 << 31) | (0 << 30) | (24 << 24) + | BitReverse((0x0F<<24) | 0x00201E, 24); Wb35Reg_WriteSync(pHwData, 0x0864, ltmp); /* Calibration (2c). turn-on TX Gm-C filter auto-tuning */ - ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFCEBC0, 24); + ltmp = (1 << 31) | (0 << 30) | (24 << 24) + | BitReverse((0x00<<24) | 0xFCEBC0, 24); Wb35Reg_WriteSync(pHwData, 0x0864, ltmp); udelay(150); /* Sleep 150 us */ /* turn off ENCAL signal */ - ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xF8EBC0, 24); + ltmp = (1 << 31) | (0 << 30) | (24 << 24) + | BitReverse((0x00<<24) | 0xF8EBC0, 24); Wb35Reg_WriteSync(pHwData, 0x0864, ltmp); /* ----- Calibration (3). RX baseband Gm-C filter auto-tuning */ -- 1.8.1.2