From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757397Ab3J1SCV (ORCPT ); Mon, 28 Oct 2013 14:02:21 -0400 Received: from smtp.codeaurora.org ([198.145.11.231]:40717 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932275Ab3J1SCK (ORCPT ); Mon, 28 Oct 2013 14:02:10 -0400 From: Stephen Boyd To: David Brown Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/6] ARM: dts: msm: Add MSM8974 GCC node Date: Mon, 28 Oct 2013 11:02:02 -0700 Message-Id: <1382983324-31155-5-git-send-email-sboyd@codeaurora.org> X-Mailer: git-send-email 1.8.4.1.600.g3d092bf In-Reply-To: <1382983324-31155-1-git-send-email-sboyd@codeaurora.org> References: <1382983324-31155-1-git-send-email-sboyd@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the necessary DT node to probe the global clock controller on MSM8974 devices. Signed-off-by: Stephen Boyd --- arch/arm/boot/dts/qcom-msm8974.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 6ac9496..c013037 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -93,5 +93,13 @@ compatible = "qcom,pshold"; reg = <0xfc4ab000 0x4>; }; + + gcc: clock-controller@fc400000 { + compatible = "qcom,gcc-8974", "qcom,gcc"; + #clock-cells = <1>; + #reset-cells = <1>; + reg = <0xfc400000 0x4000>; + }; + }; }; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation