From: Joe Perches <joe@perches.com>
To: mingo@kernel.org, hpa@zytor.com, linux-kernel@vger.kernel.org,
tglx@linutronix.de, james.t.kukunas@intel.com,
hpa@linux.intel.com,
Linus Torvalds <torvalds@linux-foundation.org>
Cc: David Miller <davem@davemloft.net>
Subject: Re: [tip:x86/asm] x86, bitops: Change bitops to be native operand size
Date: Sun, 10 Nov 2013 13:09:28 -0800 [thread overview]
Message-ID: <1384117768.3081.10.camel@joe-AO722> (raw)
In-Reply-To: <tip-z61ofiwe90xeyb461o72h8ya@git.kernel.org>
On Tue, 2013-07-16 at 18:15 -0700, tip-bot for H. Peter Anvin wrote:
> Commit-ID: 9b710506a03b01a9fdd83962912bc9d8237b82e8
[]
> x86, bitops: Change bitops to be native operand size
>
> Change the bitops operation to be naturally "long", i.e. 63 bits on
> the 64-bit kernel. Additional bugs are likely to crop up in the
> future.
> We already have bugs which machines with > 16 TiB of memory in a
> single node, as can happen if memory is interleaved. The x86 bitop
> operations take a signed index, so using an unsigned type is not an
> option.
I think it odd that any bitop index nr should be
anything other than unsigned long for any arch.
Why should this arch be any different than the
defined type in Documentation/atomic_ops.txt?
What value is a negative index when the bitmap
array address passed is the starting 0th bit?
btw: asm-generic/bitops.h doesn't match
Documentation/atomic_ops.txt either.
next prev parent reply other threads:[~2013-11-10 21:09 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-17 1:15 [tip:x86/asm] x86, bitops: Change bitops to be native operand size tip-bot for H. Peter Anvin
2013-11-10 21:09 ` Joe Perches [this message]
2013-11-10 22:10 ` H. Peter Anvin
2013-11-10 22:44 ` Joe Perches
2013-11-11 2:06 ` H. Peter Anvin
2013-11-11 2:22 ` Joe Perches
2013-11-11 23:34 ` H. Peter Anvin
2013-11-12 2:54 ` Joe Perches
2013-11-12 3:15 ` Linus Torvalds
2013-11-12 4:08 ` Joe Perches
2013-11-12 8:52 ` Geert Uytterhoeven
2013-11-30 23:16 ` Rob Landley
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