From: Scott Wood <scottwood@freescale.com>
To: <hongbo.zhang@freescale.com>
Cc: <benh@kernel.crashing.org>, <linuxppc-dev@lists.ozlabs.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] DTS: DMA: Fix DMA3 interrupts
Date: Fri, 6 Dec 2013 13:21:24 -0600 [thread overview]
Message-ID: <1386357684.7375.124.camel@snotra.buserror.net> (raw)
In-Reply-To: <1385712446-28221-1-git-send-email-hongbo.zhang@freescale.com>
On Fri, 2013-11-29 at 16:07 +0800, hongbo.zhang@freescale.com wrote:
> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>
> MPIC registers for internal interrupts is non-continous in address, any
> internal interrupt number greater than 159 should be added (16+208) to work.
> 16 is due to external interrupts as usual, 208 is due to the non-continous MPIC
> register space.
> Tested on T4240 rev2 with SRIO2 disabled.
>
> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/elo3-dma-2.dtsi | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
The FSL MPIC binding should be updated to point out how this works.
Technically it's not a change to the binding itself, since it's defined
in terms of register offset, but the explanatory text says "So interrupt
0 is at offset 0x0, interrupt 1 is at offset 0x20, and so on." which is
not accurate for these new high interrupt numbers.
-Scott
next prev parent reply other threads:[~2013-12-06 19:21 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-29 8:07 [PATCH] DTS: DMA: Fix DMA3 interrupts hongbo.zhang
2013-12-06 19:21 ` Scott Wood [this message]
2013-12-10 10:33 ` Hongbo Zhang
2013-12-10 18:33 ` Scott Wood
2013-12-12 9:46 ` Hongbo Zhang
2013-12-17 8:48 ` Li Yang
2013-12-17 19:45 ` Scott Wood
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