[PATCH] ARC: Remove ISS_SMP_EXTN entirely

[Paul Bolle <pebolle@tiscali.nl>]

The Kconfig symbol ARC_HAS_COH_RTSC was removed in v3.13. The Kconfig
entry for ISS_SMP_EXTN still had a select for that symbol. That select
was just removed in commit d345ea2892ae ("ARC: Remove
ARC_HAS_COH_RTSC").

But selecting ARC_HAS_COH_RTSC was the only thing ISS_SMP_EXTN ever
did. That means that since v3.13 setting ISS_SMP_EXTN was effectively a
nop anyhow. So ISS_SMP_EXTN can as well be removed entirely.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
---
Tested wit "git grep" only.

 arch/arc/plat-arcfpga/Kconfig | 13 -------------
 1 file changed, 13 deletions(-)

diff --git a/arch/arc/plat-arcfpga/Kconfig b/arch/arc/plat-arcfpga/Kconfig
index 33058aa40e77..fde2a3fb604d 100644
--- a/arch/arc/plat-arcfpga/Kconfig
+++ b/arch/arc/plat-arcfpga/Kconfig
@@ -8,7 +8,6 @@
 
 menuconfig ARC_PLAT_FPGA_LEGACY
 	bool "\"Legacy\" ARC FPGA dev Boards"
-	select ISS_SMP_EXTN if SMP
 	help
 	  Support for ARC development boards, provided by Synopsys.
 	  These are based on FPGA or ISS. e.g.
@@ -29,18 +28,6 @@ config ARC_BOARD_ML509
 	help
 	  ARC ML509 FPGA Ref Platform (Xilinx Virtex-5 Based)
 
-config ISS_SMP_EXTN
-	bool "ARC SMP Extensions (ISS Models only)"
-	default n
-	depends on SMP
-	help
-	  SMP Extensions to ARC700, in a "simulation only" Model, supported in
-	  ARC ISS (Instruction Set Simulator).
-	  The SMP extensions include:
-	  -IDU (Interrupt Distribution Unit)
-	  -XTL (To enable CPU start/stop/set-PC for another CPU)
-	  It doesn't provide coherent Caches and/or Atomic Ops (LLOCK/SCOND)
-
 config ARC_SERIAL_BAUD
 	int "UART Baud rate"
 	default "115200"
-- 
1.9.0