* [PATCH 3/6] perf tests: Add numeric identifier to evlist_test
2014-04-30 10:11 [GIT PULL 0/6] perf/core improvements and fixes Jiri Olsa
2014-04-29 13:47 ` [PATCH 1/6] perf tools: Handle EINTR error for readn/writen Jiri Olsa
2014-04-29 13:47 ` [PATCH 2/6] perf tools: Parse tracepoints with '-' in system name Jiri Olsa
@ 2014-04-29 13:47 ` Jiri Olsa
2014-04-29 13:47 ` [PATCH 4/6] perf tests: Add a test of kvm-390: trace event Jiri Olsa
` (3 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Jiri Olsa @ 2014-04-29 13:47 UTC (permalink / raw)
To: Ingo Molnar; +Cc: linux-kernel, Alexander Yarygin, Jiri Olsa
From: Alexander Yarygin <yarygin@linux.vnet.ibm.com>
In tests/parse-events.c test cases are declared in evlist_test[]
arrays. Elements of arrays are initialized in following pattern:
[i] = {
.name = ...,
.check = ...,
},
When perf-test is running with '-v' option, 'i' variable will be
printed for every existing test.
However, we can't add any arch specific tests inside #ifdefs, because it
will create collision between the element number inside #ifdef and the
next one outside.
This patch adds 'id' field in evlist_test, uses it as a test
identifier and removes explicit numbering of array elements. This helps
to number tests with gaps.
Signed-off-by: Alexander Yarygin <yarygin@linux.vnet.ibm.com>
Link: http://lkml.kernel.org/r/1398440047-6641-3-git-send-email-yarygin@linux.vnet.ibm.com
Signed-off-by: Jiri Olsa <jolsa@kernel.org>
---
tools/perf/tests/parse-events.c | 135 ++++++++++++++++++++++++++--------------
1 file changed, 90 insertions(+), 45 deletions(-)
diff --git a/tools/perf/tests/parse-events.c b/tools/perf/tests/parse-events.c
index 8605ff5..81dbd5a 100644
--- a/tools/perf/tests/parse-events.c
+++ b/tools/perf/tests/parse-events.c
@@ -1174,188 +1174,233 @@ static int test__all_tracepoints(struct perf_evlist *evlist)
struct evlist_test {
const char *name;
__u32 type;
+ const int id;
int (*check)(struct perf_evlist *evlist);
};
static struct evlist_test test__events[] = {
- [0] = {
+ {
.name = "syscalls:sys_enter_open",
.check = test__checkevent_tracepoint,
+ .id = 0,
},
- [1] = {
+ {
.name = "syscalls:*",
.check = test__checkevent_tracepoint_multi,
+ .id = 1,
},
- [2] = {
+ {
.name = "r1a",
.check = test__checkevent_raw,
+ .id = 2,
},
- [3] = {
+ {
.name = "1:1",
.check = test__checkevent_numeric,
+ .id = 3,
},
- [4] = {
+ {
.name = "instructions",
.check = test__checkevent_symbolic_name,
+ .id = 4,
},
- [5] = {
+ {
.name = "cycles/period=100000,config2/",
.check = test__checkevent_symbolic_name_config,
+ .id = 5,
},
- [6] = {
+ {
.name = "faults",
.check = test__checkevent_symbolic_alias,
+ .id = 6,
},
- [7] = {
+ {
.name = "L1-dcache-load-miss",
.check = test__checkevent_genhw,
+ .id = 7,
},
- [8] = {
+ {
.name = "mem:0",
.check = test__checkevent_breakpoint,
+ .id = 8,
},
- [9] = {
+ {
.name = "mem:0:x",
.check = test__checkevent_breakpoint_x,
+ .id = 9,
},
- [10] = {
+ {
.name = "mem:0:r",
.check = test__checkevent_breakpoint_r,
+ .id = 10,
},
- [11] = {
+ {
.name = "mem:0:w",
.check = test__checkevent_breakpoint_w,
+ .id = 11,
},
- [12] = {
+ {
.name = "syscalls:sys_enter_open:k",
.check = test__checkevent_tracepoint_modifier,
+ .id = 12,
},
- [13] = {
+ {
.name = "syscalls:*:u",
.check = test__checkevent_tracepoint_multi_modifier,
+ .id = 13,
},
- [14] = {
+ {
.name = "r1a:kp",
.check = test__checkevent_raw_modifier,
+ .id = 14,
},
- [15] = {
+ {
.name = "1:1:hp",
.check = test__checkevent_numeric_modifier,
+ .id = 15,
},
- [16] = {
+ {
.name = "instructions:h",
.check = test__checkevent_symbolic_name_modifier,
+ .id = 16,
},
- [17] = {
+ {
.name = "faults:u",
.check = test__checkevent_symbolic_alias_modifier,
+ .id = 17,
},
- [18] = {
+ {
.name = "L1-dcache-load-miss:kp",
.check = test__checkevent_genhw_modifier,
+ .id = 18,
},
- [19] = {
+ {
.name = "mem:0:u",
.check = test__checkevent_breakpoint_modifier,
+ .id = 19,
},
- [20] = {
+ {
.name = "mem:0:x:k",
.check = test__checkevent_breakpoint_x_modifier,
+ .id = 20,
},
- [21] = {
+ {
.name = "mem:0:r:hp",
.check = test__checkevent_breakpoint_r_modifier,
+ .id = 21,
},
- [22] = {
+ {
.name = "mem:0:w:up",
.check = test__checkevent_breakpoint_w_modifier,
+ .id = 22,
},
- [23] = {
+ {
.name = "r1,syscalls:sys_enter_open:k,1:1:hp",
.check = test__checkevent_list,
+ .id = 23,
},
- [24] = {
+ {
.name = "instructions:G",
.check = test__checkevent_exclude_host_modifier,
+ .id = 24,
},
- [25] = {
+ {
.name = "instructions:H",
.check = test__checkevent_exclude_guest_modifier,
+ .id = 25,
},
- [26] = {
+ {
.name = "mem:0:rw",
.check = test__checkevent_breakpoint_rw,
+ .id = 26,
},
- [27] = {
+ {
.name = "mem:0:rw:kp",
.check = test__checkevent_breakpoint_rw_modifier,
+ .id = 27,
},
- [28] = {
+ {
.name = "{instructions:k,cycles:upp}",
.check = test__group1,
+ .id = 28,
},
- [29] = {
+ {
.name = "{faults:k,cache-references}:u,cycles:k",
.check = test__group2,
+ .id = 29,
},
- [30] = {
+ {
.name = "group1{syscalls:sys_enter_open:H,cycles:kppp},group2{cycles,1:3}:G,instructions:u",
.check = test__group3,
+ .id = 30,
},
- [31] = {
+ {
.name = "{cycles:u,instructions:kp}:p",
.check = test__group4,
+ .id = 31,
},
- [32] = {
+ {
.name = "{cycles,instructions}:G,{cycles:G,instructions:G},cycles",
.check = test__group5,
+ .id = 32,
},
- [33] = {
+ {
.name = "*:*",
.check = test__all_tracepoints,
+ .id = 33,
},
- [34] = {
+ {
.name = "{cycles,cache-misses:G}:H",
.check = test__group_gh1,
+ .id = 34,
},
- [35] = {
+ {
.name = "{cycles,cache-misses:H}:G",
.check = test__group_gh2,
+ .id = 35,
},
- [36] = {
+ {
.name = "{cycles:G,cache-misses:H}:u",
.check = test__group_gh3,
+ .id = 36,
},
- [37] = {
+ {
.name = "{cycles:G,cache-misses:H}:uG",
.check = test__group_gh4,
+ .id = 37,
},
- [38] = {
+ {
.name = "{cycles,cache-misses,branch-misses}:S",
.check = test__leader_sample1,
+ .id = 38,
},
- [39] = {
+ {
.name = "{instructions,branch-misses}:Su",
.check = test__leader_sample2,
+ .id = 39,
},
- [40] = {
+ {
.name = "instructions:uDp",
.check = test__checkevent_pinned_modifier,
+ .id = 40,
},
- [41] = {
+ {
.name = "{cycles,cache-misses,branch-misses}:D",
.check = test__pinned_group,
+ .id = 41,
},
};
static struct evlist_test test__events_pmu[] = {
- [0] = {
+ {
.name = "cpu/config=10,config1,config2=3,period=1000/u",
.check = test__checkevent_pmu,
+ .id = 0,
},
- [1] = {
+ {
.name = "cpu/config=1,name=krava/u,cpu/config=2/u",
.check = test__checkevent_pmu_name,
+ .id = 1,
},
};
@@ -1402,7 +1447,7 @@ static int test_events(struct evlist_test *events, unsigned cnt)
for (i = 0; i < cnt; i++) {
struct evlist_test *e = &events[i];
- pr_debug("running test %d '%s'\n", i, e->name);
+ pr_debug("running test %d '%s'\n", e->id, e->name);
ret1 = test_event(e);
if (ret1)
ret2 = ret1;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 6/6] perf tools ARM64: Wire up perf_regs and unwind support
2014-04-30 10:11 [GIT PULL 0/6] perf/core improvements and fixes Jiri Olsa
` (4 preceding siblings ...)
2014-04-29 13:47 ` [PATCH 5/6] perf tools: Move u64_swap union Jiri Olsa
@ 2014-04-29 13:47 ` Jiri Olsa
2014-05-01 6:26 ` [GIT PULL 0/6] perf/core improvements and fixes Ingo Molnar
6 siblings, 0 replies; 8+ messages in thread
From: Jiri Olsa @ 2014-04-29 13:47 UTC (permalink / raw)
To: Ingo Molnar; +Cc: linux-kernel, Jean Pihet, Jiri Olsa
From: Jean Pihet <jean.pihet@linaro.org>
This patch hooks in the perf_regs and libunwind code for ARM64.
The tools/perf/arch/arm64 is created; it contains the arch specific
code for DWARF unwinding.
Signed-off-by: Jean Pihet <jean.pihet@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Link: http://lkml.kernel.org/r/1398688353-3737-1-git-send-email-jean.pihet@linaro.org
Signed-off-by: Jiri Olsa <jolsa@kernel.org>
---
tools/perf/arch/arm64/Makefile | 7 +++
tools/perf/arch/arm64/include/perf_regs.h | 88 +++++++++++++++++++++++++++
tools/perf/arch/arm64/util/dwarf-regs.c | 80 ++++++++++++++++++++++++
tools/perf/arch/arm64/util/unwind-libunwind.c | 82 +++++++++++++++++++++++++
tools/perf/config/Makefile | 8 ++-
5 files changed, 264 insertions(+), 1 deletion(-)
create mode 100644 tools/perf/arch/arm64/Makefile
create mode 100644 tools/perf/arch/arm64/include/perf_regs.h
create mode 100644 tools/perf/arch/arm64/util/dwarf-regs.c
create mode 100644 tools/perf/arch/arm64/util/unwind-libunwind.c
diff --git a/tools/perf/arch/arm64/Makefile b/tools/perf/arch/arm64/Makefile
new file mode 100644
index 0000000..67e9b3d
--- /dev/null
+++ b/tools/perf/arch/arm64/Makefile
@@ -0,0 +1,7 @@
+ifndef NO_DWARF
+PERF_HAVE_DWARF_REGS := 1
+LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
+endif
+ifndef NO_LIBUNWIND
+LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind-libunwind.o
+endif
diff --git a/tools/perf/arch/arm64/include/perf_regs.h b/tools/perf/arch/arm64/include/perf_regs.h
new file mode 100644
index 0000000..2359546
--- /dev/null
+++ b/tools/perf/arch/arm64/include/perf_regs.h
@@ -0,0 +1,88 @@
+#ifndef ARCH_PERF_REGS_H
+#define ARCH_PERF_REGS_H
+
+#include <stdlib.h>
+#include "../../util/types.h"
+#include <asm/perf_regs.h>
+
+#define PERF_REGS_MASK ((1ULL << PERF_REG_ARM64_MAX) - 1)
+#define PERF_REG_IP PERF_REG_ARM64_PC
+#define PERF_REG_SP PERF_REG_ARM64_SP
+
+static inline const char *perf_reg_name(int id)
+{
+ switch (id) {
+ case PERF_REG_ARM64_X0:
+ return "x0";
+ case PERF_REG_ARM64_X1:
+ return "x1";
+ case PERF_REG_ARM64_X2:
+ return "x2";
+ case PERF_REG_ARM64_X3:
+ return "x3";
+ case PERF_REG_ARM64_X4:
+ return "x4";
+ case PERF_REG_ARM64_X5:
+ return "x5";
+ case PERF_REG_ARM64_X6:
+ return "x6";
+ case PERF_REG_ARM64_X7:
+ return "x7";
+ case PERF_REG_ARM64_X8:
+ return "x8";
+ case PERF_REG_ARM64_X9:
+ return "x9";
+ case PERF_REG_ARM64_X10:
+ return "x10";
+ case PERF_REG_ARM64_X11:
+ return "x11";
+ case PERF_REG_ARM64_X12:
+ return "x12";
+ case PERF_REG_ARM64_X13:
+ return "x13";
+ case PERF_REG_ARM64_X14:
+ return "x14";
+ case PERF_REG_ARM64_X15:
+ return "x15";
+ case PERF_REG_ARM64_X16:
+ return "x16";
+ case PERF_REG_ARM64_X17:
+ return "x17";
+ case PERF_REG_ARM64_X18:
+ return "x18";
+ case PERF_REG_ARM64_X19:
+ return "x19";
+ case PERF_REG_ARM64_X20:
+ return "x20";
+ case PERF_REG_ARM64_X21:
+ return "x21";
+ case PERF_REG_ARM64_X22:
+ return "x22";
+ case PERF_REG_ARM64_X23:
+ return "x23";
+ case PERF_REG_ARM64_X24:
+ return "x24";
+ case PERF_REG_ARM64_X25:
+ return "x25";
+ case PERF_REG_ARM64_X26:
+ return "x26";
+ case PERF_REG_ARM64_X27:
+ return "x27";
+ case PERF_REG_ARM64_X28:
+ return "x28";
+ case PERF_REG_ARM64_X29:
+ return "x29";
+ case PERF_REG_ARM64_SP:
+ return "sp";
+ case PERF_REG_ARM64_LR:
+ return "lr";
+ case PERF_REG_ARM64_PC:
+ return "pc";
+ default:
+ return NULL;
+ }
+
+ return NULL;
+}
+
+#endif /* ARCH_PERF_REGS_H */
diff --git a/tools/perf/arch/arm64/util/dwarf-regs.c b/tools/perf/arch/arm64/util/dwarf-regs.c
new file mode 100644
index 0000000..d49efeb
--- /dev/null
+++ b/tools/perf/arch/arm64/util/dwarf-regs.c
@@ -0,0 +1,80 @@
+/*
+ * Mapping of DWARF debug register numbers into register names.
+ *
+ * Copyright (C) 2010 Will Deacon, ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <stddef.h>
+#include <dwarf-regs.h>
+
+struct pt_regs_dwarfnum {
+ const char *name;
+ unsigned int dwarfnum;
+};
+
+#define STR(s) #s
+#define REG_DWARFNUM_NAME(r, num) {.name = r, .dwarfnum = num}
+#define GPR_DWARFNUM_NAME(num) \
+ {.name = STR(%x##num), .dwarfnum = num}
+#define REG_DWARFNUM_END {.name = NULL, .dwarfnum = 0}
+
+/*
+ * Reference:
+ * http://infocenter.arm.com/help/topic/com.arm.doc.ihi0057b/IHI0057B_aadwarf64.pdf
+ */
+static const struct pt_regs_dwarfnum regdwarfnum_table[] = {
+ GPR_DWARFNUM_NAME(0),
+ GPR_DWARFNUM_NAME(1),
+ GPR_DWARFNUM_NAME(2),
+ GPR_DWARFNUM_NAME(3),
+ GPR_DWARFNUM_NAME(4),
+ GPR_DWARFNUM_NAME(5),
+ GPR_DWARFNUM_NAME(6),
+ GPR_DWARFNUM_NAME(7),
+ GPR_DWARFNUM_NAME(8),
+ GPR_DWARFNUM_NAME(9),
+ GPR_DWARFNUM_NAME(10),
+ GPR_DWARFNUM_NAME(11),
+ GPR_DWARFNUM_NAME(12),
+ GPR_DWARFNUM_NAME(13),
+ GPR_DWARFNUM_NAME(14),
+ GPR_DWARFNUM_NAME(15),
+ GPR_DWARFNUM_NAME(16),
+ GPR_DWARFNUM_NAME(17),
+ GPR_DWARFNUM_NAME(18),
+ GPR_DWARFNUM_NAME(19),
+ GPR_DWARFNUM_NAME(20),
+ GPR_DWARFNUM_NAME(21),
+ GPR_DWARFNUM_NAME(22),
+ GPR_DWARFNUM_NAME(23),
+ GPR_DWARFNUM_NAME(24),
+ GPR_DWARFNUM_NAME(25),
+ GPR_DWARFNUM_NAME(26),
+ GPR_DWARFNUM_NAME(27),
+ GPR_DWARFNUM_NAME(28),
+ GPR_DWARFNUM_NAME(29),
+ REG_DWARFNUM_NAME("%lr", 30),
+ REG_DWARFNUM_NAME("%sp", 31),
+ REG_DWARFNUM_END,
+};
+
+/**
+ * get_arch_regstr() - lookup register name from it's DWARF register number
+ * @n: the DWARF register number
+ *
+ * get_arch_regstr() returns the name of the register in struct
+ * regdwarfnum_table from it's DWARF register number. If the register is not
+ * found in the table, this returns NULL;
+ */
+const char *get_arch_regstr(unsigned int n)
+{
+ const struct pt_regs_dwarfnum *roff;
+ for (roff = regdwarfnum_table; roff->name != NULL; roff++)
+ if (roff->dwarfnum == n)
+ return roff->name;
+ return NULL;
+}
diff --git a/tools/perf/arch/arm64/util/unwind-libunwind.c b/tools/perf/arch/arm64/util/unwind-libunwind.c
new file mode 100644
index 0000000..436ee43
--- /dev/null
+++ b/tools/perf/arch/arm64/util/unwind-libunwind.c
@@ -0,0 +1,82 @@
+
+#include <errno.h>
+#include <libunwind.h>
+#include "perf_regs.h"
+#include "../../util/unwind.h"
+
+int libunwind__arch_reg_id(int regnum)
+{
+ switch (regnum) {
+ case UNW_AARCH64_X0:
+ return PERF_REG_ARM64_X0;
+ case UNW_AARCH64_X1:
+ return PERF_REG_ARM64_X1;
+ case UNW_AARCH64_X2:
+ return PERF_REG_ARM64_X2;
+ case UNW_AARCH64_X3:
+ return PERF_REG_ARM64_X3;
+ case UNW_AARCH64_X4:
+ return PERF_REG_ARM64_X4;
+ case UNW_AARCH64_X5:
+ return PERF_REG_ARM64_X5;
+ case UNW_AARCH64_X6:
+ return PERF_REG_ARM64_X6;
+ case UNW_AARCH64_X7:
+ return PERF_REG_ARM64_X7;
+ case UNW_AARCH64_X8:
+ return PERF_REG_ARM64_X8;
+ case UNW_AARCH64_X9:
+ return PERF_REG_ARM64_X9;
+ case UNW_AARCH64_X10:
+ return PERF_REG_ARM64_X10;
+ case UNW_AARCH64_X11:
+ return PERF_REG_ARM64_X11;
+ case UNW_AARCH64_X12:
+ return PERF_REG_ARM64_X12;
+ case UNW_AARCH64_X13:
+ return PERF_REG_ARM64_X13;
+ case UNW_AARCH64_X14:
+ return PERF_REG_ARM64_X14;
+ case UNW_AARCH64_X15:
+ return PERF_REG_ARM64_X15;
+ case UNW_AARCH64_X16:
+ return PERF_REG_ARM64_X16;
+ case UNW_AARCH64_X17:
+ return PERF_REG_ARM64_X17;
+ case UNW_AARCH64_X18:
+ return PERF_REG_ARM64_X18;
+ case UNW_AARCH64_X19:
+ return PERF_REG_ARM64_X19;
+ case UNW_AARCH64_X20:
+ return PERF_REG_ARM64_X20;
+ case UNW_AARCH64_X21:
+ return PERF_REG_ARM64_X21;
+ case UNW_AARCH64_X22:
+ return PERF_REG_ARM64_X22;
+ case UNW_AARCH64_X23:
+ return PERF_REG_ARM64_X23;
+ case UNW_AARCH64_X24:
+ return PERF_REG_ARM64_X24;
+ case UNW_AARCH64_X25:
+ return PERF_REG_ARM64_X25;
+ case UNW_AARCH64_X26:
+ return PERF_REG_ARM64_X26;
+ case UNW_AARCH64_X27:
+ return PERF_REG_ARM64_X27;
+ case UNW_AARCH64_X28:
+ return PERF_REG_ARM64_X28;
+ case UNW_AARCH64_X29:
+ return PERF_REG_ARM64_X29;
+ case UNW_AARCH64_X30:
+ return PERF_REG_ARM64_LR;
+ case UNW_AARCH64_SP:
+ return PERF_REG_ARM64_SP;
+ case UNW_AARCH64_PC:
+ return PERF_REG_ARM64_PC;
+ default:
+ pr_err("unwind: invalid reg id %d\n", regnum);
+ return -EINVAL;
+ }
+
+ return -EINVAL;
+}
diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
index a71fb39..cd56869 100644
--- a/tools/perf/config/Makefile
+++ b/tools/perf/config/Makefile
@@ -29,11 +29,17 @@ ifeq ($(ARCH),x86)
endif
NO_PERF_REGS := 0
endif
+
ifeq ($(ARCH),arm)
NO_PERF_REGS := 0
LIBUNWIND_LIBS = -lunwind -lunwind-arm
endif
+ifeq ($(ARCH),arm64)
+ NO_PERF_REGS := 0
+ LIBUNWIND_LIBS = -lunwind -lunwind-aarch64
+endif
+
# So far there's only x86 libdw unwind support merged in perf.
# Disable it on all other architectures in case libdw unwind
# support is detected in system. Add supported architectures
@@ -363,7 +369,7 @@ else
endif
ifndef NO_LIBUNWIND
- ifeq ($(ARCH),arm)
+ ifeq ($(ARCH),$(filter $(ARCH),arm arm64))
$(call feature_check,libunwind-debug-frame)
ifneq ($(feature-libunwind-debug-frame), 1)
msg := $(warning No debug_frame support found in libunwind);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 8+ messages in thread