From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757088AbaEEWqt (ORCPT ); Mon, 5 May 2014 18:46:49 -0400 Received: from mail-by2lp0241.outbound.protection.outlook.com ([207.46.163.241]:15611 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1756912AbaEEWqr (ORCPT ); Mon, 5 May 2014 18:46:47 -0400 From: To: , , , , , , , , , , CC: , , , , , , Subject: [PATCHv3 2/3] dts: socfpga: Add bindings for Altera SoC SDRAM EDAC Date: Mon, 5 May 2014 17:52:16 -0500 Message-ID: <1399330337-16748-3-git-send-email-tthayer@altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1399330337-16748-1-git-send-email-tthayer@altera.com> References: <1399330337-16748-1-git-send-email-tthayer@altera.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:66.35.236.232;CTRY:US;IPV:NLI;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10019001)(6009001)(189002)(199002)(62966002)(50986999)(83322001)(76176999)(2201001)(86152002)(88136002)(89996001)(4396001)(92726001)(87936001)(74502001)(48376002)(93916002)(77156001)(87286001)(86362001)(6806004)(44976005)(19580395003)(74662001)(99396002)(50226001)(19580405001)(36756003)(33646001)(20776003)(50466002)(46102001)(2009001)(77982001)(83072002)(31966008)(92566001)(84676001)(85852003)(81342001)(76482001)(79102001)(575784001)(16796002)(80022001)(47776003)(81542001)(97736001)(1121002)(921003)(83996005)(2101003);DIR:OUT;SFP:1102;SCL:1;SRVR:BL2FFO11HUB009;H:SJ-ITEXEDGE02.altera.priv.altera.com;FPR:4A9AC4EE.AFDC9C08.7BF7BF27.98D66238.2019F;MLV:sfv;PTR:InfoDomainNonexistent;MX:1;A:1;LANG:en; X-OriginatorOrg: altera.onmicrosoft.com X-Forefront-PRVS: 0202D21D2F Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Thor Thayer Addition of the Altera SDRAM EDAC bindings and device tree changes to the Altera SoC project. --- v2: Changes to SoC EDAC source code. v3: Fix typo in device tree documentation. Signed-off-by: Thor Thayer --- .../bindings/arm/altera/socfpga-sdram-edac.txt | 12 ++++++++++++ arch/arm/boot/dts/socfpga.dtsi | 5 +++++ 2 files changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt new file mode 100644 index 0000000..431e98b --- /dev/null +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt @@ -0,0 +1,12 @@ +Altera SOCFPGA SDRAM Error Detection & Correction [EDAC] + +Required properties: +- compatible : should contain "altr,sdram-edac"; +- interrupts : Should contain the SDRAM ECC IRQ in the + appropriate format for the IRQ controller. + +Example: + sdramedac@0 { + compatible = "altr,sdram-edac"; + interrupts = <0 39 4>; + }; diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 6ce912e..a0ea69b 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -681,6 +681,11 @@ reg = <0xffc25000 0x1000>; }; + sdramedac@0 { + compatible = "altr,sdram-edac"; + interrupts = <0 39 4>; + }; + rstmgr@ffd05000 { compatible = "altr,rst-mgr"; reg = <0xffd05000 0x1000>; -- 1.7.9.5