From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB37BC433DB for ; Fri, 5 Mar 2021 17:07:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9C4F965093 for ; Fri, 5 Mar 2021 17:07:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231376AbhCERGs (ORCPT ); Fri, 5 Mar 2021 12:06:48 -0500 Received: from z11.mailgun.us ([104.130.96.11]:40391 "EHLO z11.mailgun.us" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230084AbhCERGn (ORCPT ); Fri, 5 Mar 2021 12:06:43 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1614964003; h=Message-ID: References: In-Reply-To: Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=4HBFW6C5oMy1oEMtYd0HgO+nbbIQ5m8OeFCam0RueeA=; b=kR1QsHpItRX9ALbPveI9Z+6pc0MGwIy4bHkUkXn9gUZUnDdoi/oXOcZKxUmU9BZzZMcYvRXe NHhCNaEfrUy798JMRH4NNNBB5bGtd+78HQV/ceHMzjCjB8ftydlRpsnt1CtemfUnJ7/tt4mP a7mZ4Z5bHF3RankjCVgYKY2k6Jk= X-Mailgun-Sending-Ip: 104.130.96.11 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n01.prod.us-west-2.postgun.com with SMTP id 60426514c862e1b9fd3f0e81 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Fri, 05 Mar 2021 17:06:28 GMT Sender: bbhatt=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 225FAC433CA; Fri, 5 Mar 2021 17:06:28 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: bbhatt) by smtp.codeaurora.org (Postfix) with ESMTPSA id 62B50C433C6; Fri, 5 Mar 2021 17:06:27 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Fri, 05 Mar 2021 09:06:27 -0800 From: Bhaumik Bhatt To: Loic Poulain Cc: Manivannan Sadhasivam , linux-arm-msm , Hemant Kumar , Jeffrey Hugo , open list , =?UTF-8?Q?Carl_Yin=28=E6=AE=B7?= =?UTF-8?Q?=E5=BC=A0=E6=88=90=29?= , Naveen Kumar Subject: Re: [PATCH v2] bus: mhi: core: Add missing checks for MMIO register entries Organization: Qualcomm Innovation Center, Inc. Reply-To: bbhatt@codeaurora.org Mail-Reply-To: bbhatt@codeaurora.org In-Reply-To: References: <1614896049-15912-1-git-send-email-bbhatt@codeaurora.org> Message-ID: <13b24e06c99ab497ea1a1af0496b0b7a@codeaurora.org> X-Sender: bbhatt@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2021-03-05 09:11 AM, Loic Poulain wrote: > On Thu, 4 Mar 2021 at 23:14, Bhaumik Bhatt > wrote: >> >> As per documentation, fields marked as (required) in an MHI >> controller structure need to be populated by the controller driver >> before calling mhi_register_controller(). Ensure all required >> pointers and non-zero fields are present in the controller before >> proceeding with registration. >> >> Signed-off-by: Bhaumik Bhatt >> --- >> drivers/bus/mhi/core/init.c | 7 +++---- >> 1 file changed, 3 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c >> index 272f350..fed8a25 100644 >> --- a/drivers/bus/mhi/core/init.c >> +++ b/drivers/bus/mhi/core/init.c >> @@ -879,10 +879,9 @@ int mhi_register_controller(struct mhi_controller >> *mhi_cntrl, >> u32 soc_info; >> int ret, i; >> >> - if (!mhi_cntrl) >> - return -EINVAL; >> - >> - if (!mhi_cntrl->runtime_get || !mhi_cntrl->runtime_put || >> + if (!mhi_cntrl || !mhi_cntrl->cntrl_dev || !mhi_cntrl->regs || >> + !mhi_cntrl->fw_image || !mhi_cntrl->irq || > > Can we make fw_image optional, not all MHI devices are flashless, some > directly boot into AMSS without firmware loading. > Haha. Just as I posted this, I thought of the same thing. I agree. v3 incoming. Also, that patch will be a separate one so I can just remove FW image from here and post the patch to make FW image optional. >> + !mhi_cntrl->runtime_get || !mhi_cntrl->runtime_put || >> !mhi_cntrl->status_cb || !mhi_cntrl->read_reg || >> !mhi_cntrl->write_reg || !mhi_cntrl->nr_irqs) >> return -EINVAL; >> -- >> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora >> Forum, >> a Linux Foundation Collaborative Project >> Thanks, Bhaumik --- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project