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From: <Conor.Dooley@microchip.com>
To: <robh@kernel.org>
Cc: <tglx@linutronix.de>, <maz@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>, <mail@conchuod.ie>,
	<palmer@dabbelt.com>, <paul.walmsley@sifive.com>,
	<aou@eecs.berkeley.edu>, <daniel.lezcano@linaro.org>,
	<anup@brainfault.org>, <guoren@kernel.org>,
	<sagar.kadam@sifive.com>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
	<qemu-riscv@nongnu.org>
Subject: Re: [PATCH 1/3] dt-bindings: timer: sifive,clint: add legacy riscv compatible
Date: Tue, 9 Aug 2022 17:30:23 +0000	[thread overview]
Message-ID: <13df168d-e414-e167-c3c9-c04eb29c675a@microchip.com> (raw)
In-Reply-To: <20220809141632.GB1706120-robh@kernel.org>

On 09/08/2022 15:16, Rob Herring wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On Fri, Aug 05, 2022 at 05:28:43PM +0100, Conor Dooley wrote:
>> From: Conor Dooley <conor.dooley@microchip.com>
>>
>> While "real" hardware might not use the compatible string "riscv,clint0"
>> it is present in the driver & QEMU uses it for automatically generated
>> virt machine dtbs. To avoid dt-validate problems with QEMU produced
>> dtbs, such as the following, add it to the binding.
>>
>> riscv-virt.dtb: clint@2000000: compatible:0: 'sifive,clint0' is not one of ['sifive,fu540-c000-clint', 'starfive,jh7100-clint', 'canaan,k210-clint']
>>
>> Reported-by: Rob Herring <robh@kernel.org>
>> Link: https://lore.kernel.org/linux-riscv/20220803170552.GA2250266-robh@kernel.org/
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>> ---
>>  .../bindings/timer/sifive,clint.yaml           | 18 ++++++++++++------
>>  1 file changed, 12 insertions(+), 6 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
>> index e64f46339079..9fcf20942582 100644
>> --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
>> +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
>> @@ -22,12 +22,18 @@ description:
>>
>>  properties:
>>    compatible:
>> -    items:
>> -      - enum:
>> -          - sifive,fu540-c000-clint
>> -          - starfive,jh7100-clint
>> -          - canaan,k210-clint
>> -      - const: sifive,clint0
>> +    oneOf:
>> +      - items:
>> +          - enum:
>> +              - sifive,fu540-c000-clint
>> +              - starfive,jh7100-clint
>> +              - canaan,k210-clint
>> +          - const: sifive,clint0
>> +      - items:
>> +          - const: sifive,clint0
>> +          - const: riscv,clint0
>> +        deprecated: true
>> +        description: For legacy systems & the qemu virt machine only
> 
> I would drop 'legacy systems'.

I took this from a comment in the driver against "riscv,plic0". Thought
it applied to both plic and clint bindings so put it in here. Happy to
drop them for v2 :)

Thanks,
Conor.


  reply	other threads:[~2022-08-09 17:31 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-05 16:28 [PATCH 0/3] Fix dt-validate issues on qemu dtbdumps due to dt-bindings Conor Dooley
2022-08-05 16:28 ` [PATCH 1/3] dt-bindings: timer: sifive,clint: add legacy riscv compatible Conor Dooley
2022-08-09 14:16   ` Rob Herring
2022-08-09 17:30     ` Conor.Dooley [this message]
2022-08-05 16:28 ` [PATCH 2/3] dt-bindings: interrupt-controller: sifive,plic: " Conor Dooley
2022-08-05 16:28 ` [PATCH 3/3] dt-bindings: riscv: add new riscv,isa strings for emulators Conor Dooley
2022-08-08 21:34 ` [PATCH 0/3] Fix dt-validate issues on qemu dtbdumps due to dt-bindings Jessica Clarke
2022-08-08 22:01   ` Conor.Dooley
2022-08-09 14:14     ` Rob Herring
2022-08-09 17:25       ` Conor.Dooley
2022-08-09 18:36       ` Conor.Dooley
2022-08-15 19:18         ` Conor.Dooley
2022-08-16 14:06           ` Andrew Jones
2022-08-16 22:53             ` Conor.Dooley
2022-08-17  7:52               ` Andrew Jones

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