RE: [PATCH V3 1/2] perf ignore LBR and offcore_rsp.

Liang, Kan
2014-07-08T14:20:53Z

>
> On Mon, Jul 07, 2014 at 06:34:25AM -0700, kan.liang@intel.com wrote:
> > + /*
> > + * Access LBR MSR may cause #GP under certain circumstances.
> > + * E.g. KVM doesn't support LBR MSR
> > + * Check all LBT MSR here.
> > + * Disable LBR access if any LBR MSRs can not be accessed.
> > + */
> > + if (x86_pmu.lbr_nr) {
> > + x86_pmu.lbr_msr_access = check_msr(x86_pmu.lbr_tos);
> > + for (i = 0; i < x86_pmu.lbr_nr; i++) {
> > + x86_pmu.lbr_msr_access &=
> > + check_msr(x86_pmu.lbr_from + i);
> > + x86_pmu.lbr_msr_access &=
> > + check_msr(x86_pmu.lbr_to + i);
> > + }
> > + }
>
> So I was going to refer you to an email I send earlier telling you that this was
> wrong, but then found it got stuck in a mailqueue on my laptop :-(
>
> In any case its wrong; just clear lbr_nr and kill lbr_msr_access. We already
> check lbr_nr in all the right places and you added lbr_msr_access to far too
> few of them (also the fact that every place you check lbr_msr_access already
> had an lbr_nr test should've been a clue).

OK. If lbr_nr is well checked at runtime, I will simply set lbr_nr to 0 here (once check_msr failed).

Thanks,
Kan