From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752677AbaIJONl (ORCPT ); Wed, 10 Sep 2014 10:13:41 -0400 Received: from mga14.intel.com ([192.55.52.115]:46269 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752269AbaIJOKf (ORCPT ); Wed, 10 Sep 2014 10:10:35 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,499,1406617200"; d="scan'208";a="589215273" From: kan.liang@intel.com To: a.p.zijlstra@chello.nl, eranian@google.com Cc: linux-kernel@vger.kernel.org, mingo@redhat.com, paulus@samba.org, acme@kernel.org, ak@linux.intel.com, kan.liang@intel.com, "Yan, Zheng" Subject: [PATCH V5 08/16] perf, x86: track number of events that use LBR callstack Date: Wed, 10 Sep 2014 10:09:05 -0400 Message-Id: <1410358153-421-9-git-send-email-kan.liang@intel.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1410358153-421-1-git-send-email-kan.liang@intel.com> References: <1410358153-421-1-git-send-email-kan.liang@intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kan Liang When enabling/disabling an event, check if the event uses the LBR callstack feature, adjust the LBR callstack usage count accordingly. Later patch will use the usage count to decide if LBR stack should be saved/restored. Signed-off-by: Yan, Zheng --- arch/x86/kernel/cpu/perf_event_intel_lbr.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c index 3a63a25..8c6da0f 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c +++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c @@ -204,9 +204,15 @@ void intel_pmu_lbr_sched_task(struct perf_event_context *ctx, bool sched_in) } } +static inline bool branch_user_callstack(unsigned br_sel) +{ + return (br_sel & X86_BR_USER) && (br_sel & X86_BR_CALL_STACK); +} + void intel_pmu_lbr_enable(struct perf_event *event) { struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + struct x86_perf_task_context *task_ctx; if (!x86_pmu.lbr_nr) return; @@ -220,6 +226,10 @@ void intel_pmu_lbr_enable(struct perf_event *event) } cpuc->br_sel = event->hw.branch_reg.reg; + task_ctx = event->ctx ? event->ctx->task_ctx_data : NULL; + if (task_ctx && branch_user_callstack(cpuc->br_sel)) + task_ctx->lbr_callstack_users++; + cpuc->lbr_users++; if (cpuc->lbr_users == 1) perf_sched_cb_enable(event->ctx->pmu); @@ -228,10 +238,15 @@ void intel_pmu_lbr_enable(struct perf_event *event) void intel_pmu_lbr_disable(struct perf_event *event) { struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + struct x86_perf_task_context *task_ctx; if (!x86_pmu.lbr_nr) return; + task_ctx = event->ctx ? event->ctx->task_ctx_data : NULL; + if (task_ctx && branch_user_callstack(cpuc->br_sel)) + task_ctx->lbr_callstack_users--; + cpuc->lbr_users--; WARN_ON_ONCE(cpuc->lbr_users < 0); -- 1.8.3.2