From: Andrew Bresticker <abrestic@chromium.org>
To: Ralf Baechle <ralf@linux-mips.org>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>,
Jeffrey Deans <jeffrey.deans@imgtec.com>,
Markos Chandras <markos.chandras@imgtec.com>,
Paul Burton <paul.burton@imgtec.com>,
Qais Yousef <qais.yousef@imgtec.com>,
Jonas Gorski <jogo@openwrt.org>,
John Crispin <blogic@openwrt.org>,
David Daney <ddaney.cavm@gmail.com>,
linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: [PATCH 00/24] MIPS GIC cleanup, part 1
Date: Mon, 15 Sep 2014 16:51:03 -0700 [thread overview]
Message-ID: <1410825087-5497-1-git-send-email-abrestic@chromium.org> (raw)
The current MIPS GIC driver and the platform code using it are rather
ugly and could use a good cleanup before adding device-tree support [0].
This major issues addressed in this series are converting the GIC (and
platforms using it) to use IRQ domains and properly mapping interrupts
through the GIC instead of using it transparently. For part 2 I plan
on: updating the driver to use proper iomem accessors, cleaning up and
moving the GIC clocksource driver to drivers/clocksource/, adding DT
support, and possibly converting the GIC driver to use generic irqchip.
Patches 1-16 are cleanups for the existing GIC driver and prepare platforms
using it for the switch to IRQ domains and using the GIC in a non-transparent
way.
Patches 17-24 convert the GIC driver to use IRQ domains and updates the
platforms using it to properly map GIC interrupts instead of using the static
routing tables to make the GIC appear transparent.
I've tested this series on Malta and, with additional patches, on the
DT-enabled Danube platform. Unfortunately I do not have SEAD-3 hardware,
so that has only been compile tested. Compile tested on all other affected
architectures (ath79, ralink, lantiq).
[0] https://lkml.org/lkml/2014/9/5/542
Andrew Bresticker (24):
MIPS: Always use IRQ domains for CPU IRQs
MIPS: Rename mips_cpu_intc_init() -> mips_cpu_irq_of_init()
MIPS: Provide a generic plat_irq_dispatch
MIPS: Set vint handler when mapping CPU interrupts
MIPS: i8259: Use IRQ domains
MIPS: Add hook to get C0 performance counter interrupt
MIPS: smp-cps: Enable all hardware interrupts on secondary CPUs
MIPS: Remove gic_{enable,disable}_interrupt()
MIPS: sead3: Remove sead3-serial.c
MIPS: sead3: Do not overlap CPU/GIC IRQ ranges
MIPS: Malta: Move MSC01 interrupt base
MIPS: Move MIPS_GIC_IRQ_BASE into platform irq.h
MIPS: Move GIC to drivers/irqchip/
irqchip: mips-gic: Implement generic irq_ack/irq_eoi callbacks
irqchip: mips-gic: Implement irq_set_type callback
irqchip: mips-gic: Fix gic_set_affinity() return value
irqchip: mips-gic: Use IRQ domains
irqchip: mips-gic: Stop using per-platform mapping tables
irqchip: mips-gic: Probe for number of external interrupts
irqchip: mips-gic: Use separate edge/level irq_chips
irqchip: mips-gic: Support local interrupts
irqchip: mips-gic: Remove unnecessary globals
MIPS: Malta: Use generic plat_irq_dispatch
MIPS: sead3: Use generic plat_irq_dispatch
Documentation/devicetree/bindings/mips/cpu_irq.txt | 4 +-
arch/mips/Kconfig | 12 +-
arch/mips/ath79/irq.c | 1 -
arch/mips/ath79/setup.c | 5 +
arch/mips/include/asm/gic.h | 82 ++-
arch/mips/include/asm/irq_cpu.h | 4 +-
arch/mips/include/asm/mach-generic/irq.h | 6 +
arch/mips/include/asm/mach-malta/irq.h | 1 -
arch/mips/include/asm/mach-sead3/irq.h | 1 -
arch/mips/include/asm/mips-boards/maltaint.h | 24 +-
arch/mips/include/asm/mips-boards/sead3int.h | 15 +-
arch/mips/include/asm/time.h | 1 +
arch/mips/kernel/Makefile | 1 -
arch/mips/kernel/cevt-gic.c | 14 +-
arch/mips/kernel/cevt-r4k.c | 4 +-
arch/mips/kernel/i8259.c | 24 +-
arch/mips/kernel/irq-gic.c | 402 --------------
arch/mips/kernel/irq_cpu.c | 45 +-
arch/mips/kernel/perf_event_mipsxx.c | 23 +-
arch/mips/kernel/smp-cps.c | 4 +-
arch/mips/kernel/smp-mt.c | 4 +-
arch/mips/lantiq/irq.c | 8 +-
arch/mips/mti-malta/malta-int.c | 307 ++---------
arch/mips/mti-malta/malta-time.c | 39 +-
arch/mips/mti-sead3/sead3-ehci.c | 8 +-
arch/mips/mti-sead3/sead3-int.c | 121 +----
arch/mips/mti-sead3/sead3-net.c | 14 +-
arch/mips/mti-sead3/sead3-platform.c | 18 +-
arch/mips/mti-sead3/sead3-serial.c | 45 --
arch/mips/mti-sead3/sead3-time.c | 35 +-
arch/mips/oprofile/op_model_mipsxx.c | 18 +-
arch/mips/ralink/irq.c | 10 +-
drivers/irqchip/Kconfig | 4 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-mips-gic.c | 597 +++++++++++++++++++++
35 files changed, 867 insertions(+), 1035 deletions(-)
delete mode 100644 arch/mips/kernel/irq-gic.c
delete mode 100644 arch/mips/mti-sead3/sead3-serial.c
create mode 100644 drivers/irqchip/irq-mips-gic.c
--
2.1.0.rc2.206.gedb03e5
next reply other threads:[~2014-09-15 23:51 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-15 23:51 Andrew Bresticker [this message]
2014-09-15 23:51 ` [PATCH 01/24] MIPS: Always use IRQ domains for CPU IRQs Andrew Bresticker
2014-09-15 23:51 ` [PATCH 02/24] MIPS: Rename mips_cpu_intc_init() -> mips_cpu_irq_of_init() Andrew Bresticker
2014-09-15 23:51 ` [PATCH 03/24] MIPS: Provide a generic plat_irq_dispatch Andrew Bresticker
2014-09-17 8:56 ` Qais Yousef
2014-09-17 16:36 ` Andrew Bresticker
2014-09-15 23:51 ` [PATCH 04/24] MIPS: Set vint handler when mapping CPU interrupts Andrew Bresticker
2014-09-15 23:51 ` [PATCH 05/24] MIPS: i8259: Use IRQ domains Andrew Bresticker
2014-09-15 23:51 ` [PATCH 06/24] MIPS: Add hook to get C0 performance counter interrupt Andrew Bresticker
2014-09-15 23:51 ` [PATCH 07/24] MIPS: smp-cps: Enable all hardware interrupts on secondary CPUs Andrew Bresticker
2014-09-15 23:51 ` [PATCH 08/24] MIPS: Remove gic_{enable,disable}_interrupt() Andrew Bresticker
2014-09-15 23:51 ` [PATCH 09/24] MIPS: sead3: Remove sead3-serial.c Andrew Bresticker
2014-09-15 23:51 ` [PATCH 10/24] MIPS: sead3: Do not overlap CPU/GIC IRQ ranges Andrew Bresticker
2014-09-15 23:51 ` [PATCH 11/24] MIPS: Malta: Move MSC01 interrupt base Andrew Bresticker
2014-09-15 23:51 ` [PATCH 12/24] MIPS: Move MIPS_GIC_IRQ_BASE into platform irq.h Andrew Bresticker
2014-09-15 23:51 ` [PATCH 13/24] MIPS: Move GIC to drivers/irqchip/ Andrew Bresticker
2014-09-15 23:51 ` [PATCH 14/24] irqchip: mips-gic: Implement generic irq_ack/irq_eoi callbacks Andrew Bresticker
2014-09-17 9:14 ` Qais Yousef
2014-09-17 17:14 ` Andrew Bresticker
2014-09-15 23:51 ` [PATCH 15/24] irqchip: mips-gic: Implement irq_set_type callback Andrew Bresticker
2014-09-15 23:51 ` [PATCH 16/24] irqchip: mips-gic: Fix gic_set_affinity() return value Andrew Bresticker
2014-09-15 23:51 ` [PATCH 17/24] irqchip: mips-gic: Use IRQ domains Andrew Bresticker
2014-09-15 23:51 ` [PATCH 18/24] irqchip: mips-gic: Stop using per-platform mapping tables Andrew Bresticker
2014-09-17 9:21 ` Qais Yousef
2014-09-15 23:51 ` [PATCH 19/24] irqchip: mips-gic: Probe for number of external interrupts Andrew Bresticker
2014-09-15 23:51 ` [PATCH 20/24] irqchip: mips-gic: Use separate edge/level irq_chips Andrew Bresticker
2014-09-17 9:24 ` Qais Yousef
2014-09-17 17:15 ` Andrew Bresticker
2014-09-15 23:51 ` [PATCH 21/24] irqchip: mips-gic: Support local interrupts Andrew Bresticker
2014-09-17 9:50 ` Qais Yousef
2014-09-17 17:40 ` Andrew Bresticker
2014-09-17 21:09 ` Andrew Bresticker
2014-09-18 6:57 ` Qais Yousef
2014-09-15 23:51 ` [PATCH 22/24] irqchip: mips-gic: Remove unnecessary globals Andrew Bresticker
2014-09-15 23:51 ` [PATCH 23/24] MIPS: Malta: Use generic plat_irq_dispatch Andrew Bresticker
2014-09-15 23:51 ` [PATCH 24/24] MIPS: sead3: " Andrew Bresticker
2014-09-17 10:20 ` [PATCH 00/24] MIPS GIC cleanup, part 1 Qais Yousef
2014-09-17 17:42 ` Andrew Bresticker
2014-09-18 7:08 ` Qais Yousef
2014-09-17 14:07 ` Jason Cooper
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