From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751747AbaKCJEJ (ORCPT ); Mon, 3 Nov 2014 04:04:09 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:36180 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751695AbaKCJEG (ORCPT ); Mon, 3 Nov 2014 04:04:06 -0500 X-Listener-Flag: 11101 From: Flora Fu To: Philipp Zabel , Rob Herring , Matthias Brugger , CC: Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Grant Likely , , , , , Sascha Hauer , Olof Johansson , Arnd Bergmann , Flora Fu Subject: [PATCH v2 3/3] ARM: dts: mt8135: Add Reset Controller for MediaTek SoC Date: Mon, 3 Nov 2014 17:02:51 +0800 Message-ID: <1415005371-4323-4-git-send-email-flora.fu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1415005371-4323-1-git-send-email-flora.fu@mediatek.com> References: <1415005371-4323-1-git-send-email-flora.fu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add reset controller to MT8135 board dts. Signed-off-by: Flora Fu --- arch/arm/boot/dts/mt8135.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi index 90a56ad..259a2b5 100644 --- a/arch/arm/boot/dts/mt8135.dtsi +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -102,6 +102,32 @@ clock-names = "system-clk", "rtc-clk"; }; + infracfg: syscon@10001000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mediatek,mt8135-infracfg", "syscon"; + reg = <0 0x10001000 0 0x1000>; + + infrarst: reset-controller@30 { + #reset-cells = <1>; + compatible = "mediatek,mt8135-infracfg-reset", "mediatek,reset"; + reg = <0x30 0x8>; + }; + }; + + pericfg: syscon@10003000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mediatek,mt8135-pericfg", "syscon"; + reg = <0 0x10003000 0 0x1000>; + + perirst: reset-controller@00 { + #reset-cells = <1>; + compatible = "mediatek,mt8135-pericfg-reset", "mediatek,reset"; + reg = <0x00 0x8>; + }; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a15-gic"; interrupt-controller; -- 1.8.1.1.dirty