From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1422713AbaKNWxG (ORCPT ); Fri, 14 Nov 2014 17:53:06 -0500 Received: from mail-ie0-f174.google.com ([209.85.223.174]:43828 "EHLO mail-ie0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935230AbaKNWxD (ORCPT ); Fri, 14 Nov 2014 17:53:03 -0500 From: Alexandru M Stan To: Heiko Stuebner , Doug Anderson , addy ke Cc: Sonny Rao , Kever Yang , Alexandru M Stan , mark.rutland@arm.com, devicetree@vger.kernel.org, mturquette@linaro.org, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, robh+dt@kernel.org, galak@codeaurora.org, mark.yao@rock-chips.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH 0/2] For now all I have is the getter and setter for the phase, nothing that uses it Date: Fri, 14 Nov 2014 14:52:52 -0800 Message-Id: <1416005574-7756-1-git-send-email-amstan@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org (that is ready). You can test the getter like this: localhost ~ # cat /sys/kernel/debug/clk/clk_summary|grep sample -C 1 sclk_sdio1 0 0 24000000 0 0 sdio1_sample 0 0 12000000 0 0 sdio1_drv 0 0 12000000 0 90 -- sclk_sdmmc 1 1 297000000 0 0 sdmmc_sample 0 0 148500000 0 134 sdmmc_drv 0 0 148500000 0 90 -- sclk_sdio0 1 1 100000000 0 0 sdio0_sample 0 0 50000000 0 0 sdio0_drv 0 0 50000000 0 90 sclk_emmc 1 1 100000000 0 0 emmc_sample 0 0 50000000 0 0 emmc_drv 0 0 50000000 0 180 Next thing that will come is some dts changes that will make use of these new clocks, and eventually mmc code will be changed to tune with these clocks. Alexandru M Stan (2): clk: rockchip: add bindings for the mmc clock phases clk: rockchip: Add support for the mmc clock phases using the framework drivers/clk/rockchip/Makefile | 1 + drivers/clk/rockchip/clk-mmc-phase.c | 150 +++++++++++++++++++++++++++++++++ drivers/clk/rockchip/clk-rk3288.c | 12 +++ drivers/clk/rockchip/clk.c | 8 ++ drivers/clk/rockchip/clk.h | 23 +++++ include/dt-bindings/clock/rk3288-cru.h | 10 +++ 6 files changed, 204 insertions(+) create mode 100644 drivers/clk/rockchip/clk-mmc-phase.c -- 2.1.0.rc2.206.gedb03e5