From: Stephen Boyd <sboyd@codeaurora.org>
To: Mike Turquette <mturquette@linaro.org>,
Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org
Subject: [PATCH 2/3] clk: qcom: lcc-msm8960: Fix PLL rate detection
Date: Thu, 29 Jan 2015 15:38:12 -0800 [thread overview]
Message-ID: <1422574693-27543-3-git-send-email-sboyd@codeaurora.org> (raw)
In-Reply-To: <1422574693-27543-1-git-send-email-sboyd@codeaurora.org>
regmap_read() returns 0 on success, not the value of the register
that is read. Fix it so we properly detect the frequency plan.
Fixes: b82875ee07e5 "clk: qcom: Add MSM8960/APQ8064 LPASS clock
controller (LCC) driver"
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
drivers/clk/qcom/lcc-msm8960.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/lcc-msm8960.c b/drivers/clk/qcom/lcc-msm8960.c
index 705e4d5bb6c7..3ecade0de9d2 100644
--- a/drivers/clk/qcom/lcc-msm8960.c
+++ b/drivers/clk/qcom/lcc-msm8960.c
@@ -547,7 +547,7 @@ static int lcc_msm8960_probe(struct platform_device *pdev)
return PTR_ERR(regmap);
/* Use the correct frequency plan depending on speed of PLL4 */
- val = regmap_read(regmap, 0x4, &val);
+ regmap_read(regmap, 0x4, &val);
if (val == 0x12) {
slimbus_src.freq_tbl = clk_tbl_aif_osr_492;
mi2s_osr_src.freq_tbl = clk_tbl_aif_osr_492;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2015-01-29 23:38 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-29 23:38 [PATCH 0/3] MSM8960 LCC fixes Stephen Boyd
2015-01-29 23:38 ` [PATCH 1/3] clk: qcom: Fix slimbus n and m val offsets Stephen Boyd
2015-01-29 23:38 ` Stephen Boyd [this message]
2015-01-29 23:38 ` [PATCH 3/3] clk: qcom: Add PLL4 vote clock Stephen Boyd
2015-02-25 20:08 ` [PATCH 0/3] MSM8960 LCC fixes Mike Turquette
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