From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932107AbbCLMPs (ORCPT ); Thu, 12 Mar 2015 08:15:48 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:16191 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754528AbbCLMPj (ORCPT ); Thu, 12 Mar 2015 08:15:39 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Thu, 12 Mar 2015 05:13:30 -0700 From: Vince Hsu To: thierry.reding@gmail.com, pdeschrijver@nvidia.com, swarren@wwwdotorg.org, gnurou@gmail.com, jroedel@suse.de, p.zabel@pengutronix.de, mturquette@linaro.org, pgaikwad@nvidia.com, sboyd@codeaurora.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tbergstrom@nvidia.com, airlied@linux.ie, bhelgaas@google.com, tj@kernel.org, arnd@arndb.de, robh@kernel.org, will.deacon@arm.com CC: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, rjw@rjwysocki.net, viresh.kumar@linaro.org, Vince Hsu Subject: [PATCH v2 06/17] clk: tegra: remove TEGRA_PLL_USE_LOCK for PLLD/PLLD2 Date: Thu, 12 Mar 2015 20:15:07 +0800 Message-ID: <1426162518-7405-7-git-send-email-vinceh@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1426162518-7405-1-git-send-email-vinceh@nvidia.com> References: <1426162518-7405-1-git-send-email-vinceh@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Tegra114 has a HW bug that the PLLD/PLLD2 lock bit cannot be asserted when the DIS power domain is during up-powergating process but the clamp to this domain is not removed yet. That causes a timeout and aborts the power sequence, although the PLLD/PLLD2 has already locked. To remove the false alarm, we don't use the lock for PLLD/PLLD2. Just wait 1ms and treat the clocks as locked. Signed-off-by: Vince Hsu --- drivers/clk/tegra/clk-tegra114.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c index d0766423a5d6..e6a480e0dcb6 100644 --- a/drivers/clk/tegra/clk-tegra114.c +++ b/drivers/clk/tegra/clk-tegra114.c @@ -456,8 +456,7 @@ static struct tegra_clk_pll_params pll_d_params = { .lock_delay = 1000, .div_nmp = &pllp_nmp, .freq_table = pll_d_freq_table, - .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON | - TEGRA_PLL_USE_LOCK, + .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON, }; static struct tegra_clk_pll_params pll_d2_params = { @@ -474,8 +473,7 @@ static struct tegra_clk_pll_params pll_d2_params = { .lock_delay = 1000, .div_nmp = &pllp_nmp, .freq_table = pll_d_freq_table, - .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON | - TEGRA_PLL_USE_LOCK, + .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON, }; static struct pdiv_map pllu_p[] = { -- 2.1.4