From: Dmitry Osipenko <digetx@gmail.com>
To: digetx@gmail.com, Stephen Warren <swarren@wwwdotorg.org>,
Thierry Reding <thierry.reding@gmail.com>,
Alexandre Courbot <gnurou@gmail.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org
Subject: [PATCH] clocksource: tegra: Maintain CPU endianness
Date: Wed, 18 Mar 2015 18:44:49 +0300 [thread overview]
Message-ID: <1426693503-6056-1-git-send-email-digetx@gmail.com> (raw)
Support big-endian kernel by using endian-aware register access functions.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
drivers/clocksource/tegra20_timer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c
index d2616ef..d8a3a4e 100644
--- a/drivers/clocksource/tegra20_timer.c
+++ b/drivers/clocksource/tegra20_timer.c
@@ -57,9 +57,9 @@ static u64 persistent_ms, last_persistent_ms;
static struct delay_timer tegra_delay_timer;
#define timer_writel(value, reg) \
- __raw_writel(value, timer_reg_base + (reg))
+ writel_relaxed(value, timer_reg_base + (reg))
#define timer_readl(reg) \
- __raw_readl(timer_reg_base + (reg))
+ readl_relaxed(timer_reg_base + (reg))
static int tegra_timer_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
--
2.3.2
next reply other threads:[~2015-03-18 15:46 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-18 15:44 Dmitry Osipenko [this message]
2015-03-26 9:58 ` [PATCH] clocksource: tegra: Maintain CPU endianness Daniel Lezcano
2015-03-26 15:31 ` Thierry Reding
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