From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752260AbbCYXZu (ORCPT ); Wed, 25 Mar 2015 19:25:50 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:59431 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752212AbbCYXZs (ORCPT ); Wed, 25 Mar 2015 19:25:48 -0400 From: Praneeth Bajjuri To: Tony Lindgren , Russell King CC: , , , Nishanth Menon , Praneeth Bajjuri Subject: [PATCH] ARM: DRA7: Enable Cortex A15 errata 798181 Date: Wed, 25 Mar 2015 18:25:09 -0500 Message-ID: <1427325909-7014-1-git-send-email-praneeth@ti.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ARM errata 798181 is applicable for OMAP5/DRA7 based devices. So enable the same in the build. DRA7xx is based on Cortex-A15 r2p2 revision. ARM Errata extract and workaround information is as below. On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not adequately shooting down all use of the old entries. The ARM_ERRATA_798181 option enables the Linux kernel workaround for this erratum which sends an IPI to the CPUs that are running the same ASID as the one being invalidated. Signed-off-by: Praneeth Bajjuri --- arch/arm/mach-omap2/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index c7d8d86..3e4b4ae 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -69,6 +69,7 @@ config SOC_DRA7XX select ARM_GIC select HAVE_ARM_ARCH_TIMER select IRQ_CROSSBAR + select ARM_ERRATA_798181 if SMP config ARCH_OMAP2PLUS bool -- 1.7.9.5