From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755995AbbDIQir (ORCPT ); Thu, 9 Apr 2015 12:38:47 -0400 Received: from mga09.intel.com ([134.134.136.24]:46814 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755952AbbDIQij (ORCPT ); Thu, 9 Apr 2015 12:38:39 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,550,1422950400"; d="scan'208";a="711399104" From: Kan Liang To: a.p.zijlstra@chello.nl, linux-kernel@vger.kernel.org Cc: mingo@kernel.org, acme@infradead.org, eranian@google.com, andi@firstfloor.org, Kan Liang Subject: [PATCH V6 6/6] perf, x86: enlarge PEBS buffer Date: Thu, 9 Apr 2015 12:37:46 -0400 Message-Id: <1428597466-8154-7-git-send-email-kan.liang@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1428597466-8154-1-git-send-email-kan.liang@intel.com> References: <1428597466-8154-1-git-send-email-kan.liang@intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Yan, Zheng Currently the PEBS buffer size is 4k, it only can hold about 21 PEBS records. This patch enlarges the PEBS buffer size to 64k (the same as BTS buffer), 64k memory can hold about 330 PEBS records. This will significantly the reduce number of PMI when large PEBS interrupt threshold is used. Signed-off-by: Yan, Zheng Signed-off-by: Kan Liang --- arch/x86/kernel/cpu/perf_event_intel_ds.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c index 3d8950a..dfbcaad 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c @@ -11,7 +11,7 @@ #define BTS_RECORD_SIZE 24 #define BTS_BUFFER_SIZE (PAGE_SIZE << 4) -#define PEBS_BUFFER_SIZE PAGE_SIZE +#define PEBS_BUFFER_SIZE (PAGE_SIZE << 4) #define PEBS_FIXUP_SIZE PAGE_SIZE /* -- 1.7.11.7