Re: [PATCH V7 3/6] perf, x86: handle multiple records in PEBS buffer

Andi Kleen
2015-05-06T13:01:21Z

> > > + if (p->status != (1 << bit)) {
> > > + u64 pebs_status;
> > > +
> > > + /* slow path */
> > > + pebs_status = p->status & cpuc->pebs_enabled;
> > > + pebs_status &= (1ULL << MAX_PEBS_EVENTS) - 1;
> > > + if (pebs_status != (1 << bit)) {
> > > + perf_log_lost(event);
> >
> > Does it make sense to keep an error[bit] count and only log once with the
> > actual number in? -- when !0 obviously.
>
> Yes, will do it.

If you use anything but u8 for the array member it would be too large
for the NMI stack, and u8 is lilkely overflow prone. Would not do it.

-Andi