From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752191AbbEGW5i (ORCPT ); Thu, 7 May 2015 18:57:38 -0400 Received: from mga01.intel.com ([192.55.52.88]:24066 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751068AbbEGW4n (ORCPT ); Thu, 7 May 2015 18:56:43 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,386,1427785200"; d="scan'208";a="725611294" From: Andi Kleen To: peterz@infradead.org Cc: kan.liang@intel.com, eranian@google.com, acme@infradead.org, linux-kernel@vger.kernel.org, Andi Kleen Subject: [PATCH 8/9] perf, x86: Optimize v4 LBR unfreezing Date: Thu, 7 May 2015 15:56:31 -0700 Message-Id: <1431039392-12589-9-git-send-email-andi@firstfloor.org> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1431039392-12589-1-git-send-email-andi@firstfloor.org> References: <1431039392-12589-1-git-send-email-andi@firstfloor.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Andi Kleen In Arch perfmon v4 the GLOBAL_STATUS reset automatically unfreezes LBRs. So no need to do it manually in the LBR code. Add a check to skip it. Signed-off-by: Andi Kleen --- arch/x86/kernel/cpu/perf_event_intel_lbr.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c index 6c48c97..64d3122 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c +++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c @@ -147,6 +147,13 @@ static void __intel_pmu_lbr_enable(bool pmi) wrmsrl(MSR_LBR_SELECT, lbr_select); } + /* + * No need to unfreeze manually, as v4 can do that as part + * of the GLOBAL_STATUS ack. + */ + if (pmi && x86_pmu.version >= 4) + return; + rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); orig_debugctl = debugctl; debugctl |= DEBUGCTLMSR_LBR; -- 1.9.3