From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756706AbbEVH4w (ORCPT ); Fri, 22 May 2015 03:56:52 -0400 Received: from mga11.intel.com ([192.55.52.93]:55529 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756480AbbEVH4p (ORCPT ); Fri, 22 May 2015 03:56:45 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,474,1427785200"; d="scan'208";a="496932268" From: Mika Westerberg To: Linus Walleij Cc: Heikki Krogerus , Mika Westerberg , Yu C Chen , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] pinctrl: cherryview: Do not mask all interrupts on probe Date: Fri, 22 May 2015 10:56:08 +0300 Message-Id: <1432281368-88687-1-git-send-email-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.1.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org BIOS/platform may use some of the pins by themselves, such as providing SCI (System Control Interrupt) from the embedded controller. The driver masks all interrupts at probe time which prevents those pins from triggering interrupts properly. Fix this by not masking all interrupts at probe -- it should be enough just to clear the status register. Reported-by: Yu C Chen Signed-off-by: Mika Westerberg --- drivers/pinctrl/intel/pinctrl-cherryview.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index 82f691eeeec4..c9c0257a370c 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -1417,8 +1417,7 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq) offset += range->npins; } - /* Mask and clear all interrupts */ - chv_writel(0, pctrl->regs + CHV_INTMASK); + /* Clear all interrupts */ chv_writel(0xffff, pctrl->regs + CHV_INTSTAT); ret = gpiochip_irqchip_add(chip, &chv_gpio_irqchip, 0, -- 2.1.4