From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: linux-kernel@vger.kernel.org,
Sascha Hauer <kernel@pengutronix.de>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Tero Kristo <t-kristo@ti.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Russell King <linux@arm.linux.org.uk>,
Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH v4 3/6] clk: socfpga: switch to GENMASK()
Date: Thu, 9 Jul 2015 19:43:51 +0300 [thread overview]
Message-ID: <1436460234-61425-4-git-send-email-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <1436460234-61425-1-git-send-email-andriy.shevchenko@linux.intel.com>
Convert the code to use GENMASK() helper instead of div_mask() macro.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/clk/socfpga/clk-gate.c | 2 +-
drivers/clk/socfpga/clk-periph.c | 2 +-
drivers/clk/socfpga/clk.h | 1 -
3 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/socfpga/clk-gate.c b/drivers/clk/socfpga/clk-gate.c
index dd3a78c..d61052e 100644
--- a/drivers/clk/socfpga/clk-gate.c
+++ b/drivers/clk/socfpga/clk-gate.c
@@ -110,7 +110,7 @@ static unsigned long socfpga_clk_recalc_rate(struct clk_hw *hwclk,
div = socfpgaclk->fixed_div;
else if (socfpgaclk->div_reg) {
val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
- val &= div_mask(socfpgaclk->width);
+ val &= GENMASK(socfpgaclk->width - 1, 0);
/* Check for GPIO_DB_CLK by its offset */
if ((int) socfpgaclk->div_reg & SOCFPGA_GPIO_DB_CLK_OFFSET)
div = val + 1;
diff --git a/drivers/clk/socfpga/clk-periph.c b/drivers/clk/socfpga/clk-periph.c
index 46531c3..fc410a4 100644
--- a/drivers/clk/socfpga/clk-periph.c
+++ b/drivers/clk/socfpga/clk-periph.c
@@ -36,7 +36,7 @@ static unsigned long clk_periclk_recalc_rate(struct clk_hw *hwclk,
} else {
if (socfpgaclk->div_reg) {
val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
- val &= div_mask(socfpgaclk->width);
+ val &= GENMASK(socfpgaclk->width - 1, 0);
parent_rate /= (val + 1);
}
div = ((readl(socfpgaclk->hw.reg) & 0x1ff) + 1);
diff --git a/drivers/clk/socfpga/clk.h b/drivers/clk/socfpga/clk.h
index d291f60..5278156 100644
--- a/drivers/clk/socfpga/clk.h
+++ b/drivers/clk/socfpga/clk.h
@@ -27,7 +27,6 @@
#define CLKMGR_PERPLL_SRC 0xAC
#define SOCFPGA_MAX_PARENTS 3
-#define div_mask(width) ((1 << (width)) - 1)
extern void __iomem *clk_mgr_base_addr;
--
2.1.4
next prev parent reply other threads:[~2015-07-09 16:44 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-09 16:43 [PATCH v4 0/6] clk: replace div_mask() by GENMASK() Andy Shevchenko
2015-07-09 16:43 ` [PATCH v4 1/6] clk: divider: switch to GENMASK() Andy Shevchenko
2015-07-09 16:43 ` [PATCH v4 2/6] clk: mmp: " Andy Shevchenko
2015-07-09 16:43 ` Andy Shevchenko [this message]
2015-07-09 19:50 ` [PATCH v4 3/6] clk: socfpga: " Dinh Nguyen
2015-07-09 20:54 ` Andy Shevchenko
2015-07-09 16:43 ` [PATCH v4 4/6] clk: ti: divider: " Andy Shevchenko
2015-07-09 16:43 ` [PATCH v4 5/6] clk: tegra: " Andy Shevchenko
2015-07-09 16:43 ` [PATCH v4 6/6] ARM: imx: " Andy Shevchenko
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