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From: YH Huang <yh.huang@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Thierry Reding <thierry.reding@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
	<linux-pwm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<srv_heupstream@mediatek.com>,
	<linux-mediatek@lists.infradead.org>,
	Sascha Hauer <kernel@pengutronix.de>, <yingjoe.chen@mediatek.com>,
	YH Huang <yh.huang@mediatek.com>
Subject: [PATCH v5 1/3] dt-bindings: pwm: add MediaTek display PWM bindings
Date: Mon, 13 Jul 2015 17:04:52 +0800	[thread overview]
Message-ID: <1436778294-47635-2-git-send-email-yh.huang@mediatek.com> (raw)
In-Reply-To: <1436778294-47635-1-git-send-email-yh.huang@mediatek.com>

Document the device-tree binding of MediatTek display PWM.
The PWM has one channel to control the backlight brightness for display.
It supports MT8173 and MT6595.

Signed-off-by: YH Huang <yh.huang@mediatek.com>
---
 .../devicetree/bindings/pwm/pwm-mtk-disp.txt       | 29 ++++++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt

diff --git a/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt
new file mode 100644
index 0000000..aac29dc
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt
@@ -0,0 +1,29 @@
+MediaTek display PWM controller
+
+Required properties:
+ - compatible: should be "mediatek,<name>-disp-pwm":
+   - "mediatek,mt8173-disp-pwm": found on mt8173 SoC.
+   - "mediatek,mt6595-disp-pwm": found on mt6595 SoC.
+ - reg: physical base address and length of the controller's registers.
+ - #pwm-cells: must be 2. See pwm.txt in this directory for a description of
+   the cell format.
+ - clocks: phandle and clock specifier of the PWM reference clock.
+ - clock-names: must contain the following:
+   - "main": clock used to generate PWM signals.
+   - "mm": sync signals from the modules of mmsys.
+ - pinctrl-names: Must contain a "default" entry.
+ - pinctrl-0: One property must exist for each entry in pinctrl-names.
+   See pinctrl/pinctrl-bindings.txt for details of the property values.
+
+Example:
+	pwm0: pwm@1401e000 {
+		compatible = "mediatek,mt8173-disp-pwm",
+			     "mediatek,mt6595-disp-pwm";
+		reg = <0 0x1401e000 0 0x1000>;
+		#pwm-cells = <2>;
+		clocks = <&mmsys CLK_MM_DISP_PWM026M>,
+			 <&mmsys CLK_MM_DISP_PWM0MM>;
+		clock-names = "main", "mm";
+		pinctrl-names = "default";
+		pinctrl-0 = <&disp_pwm0_pins>;
+	};
-- 
1.8.1.1.dirty


  reply	other threads:[~2015-07-13  9:06 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-13  9:04 [PATCH v5 0/3] Add MediaTek display PWM driver YH Huang
2015-07-13  9:04 ` YH Huang [this message]
2015-07-13 10:20   ` [PATCH v5 1/3] dt-bindings: pwm: add MediaTek display PWM bindings Daniel Kurtz
2015-07-15 15:37     ` YH Huang
2015-07-13  9:04 ` [PATCH v5 2/3] pwm: add MediaTek display PWM driver support YH Huang
2015-07-13 10:19   ` Daniel Kurtz
2015-07-15 15:59     ` YH Huang
2015-07-16  5:38       ` YH Huang
2015-07-16  6:54         ` Daniel Kurtz
2015-07-16  7:17           ` YH Huang
2015-07-16 15:21             ` Daniel Kurtz
2015-07-16 16:44               ` YH Huang
2015-07-16 17:18                 ` Daniel Kurtz
2015-07-17  6:35                   ` YH Huang
2015-07-17  6:59                     ` Daniel Kurtz
2015-07-17  8:01                       ` YH Huang
2015-07-13  9:04 ` [PATCH v5 3/3] arm64: dts: mt8173: add MT8173 display PWM driver support node YH Huang

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