From: <dinguyen@opensource.altera.com>
To: <p.zabel@pengutronix.de>
Cc: <dinh.linux@gmail.com>, <robh+dt@kernel.org>,
<ijc+devicetree@hellion.org.uk>, <galak@codeaurora.org>,
<mark.rutland@arm.com>, <pawel.moll@arm.com>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<s.trumtrar@pengutronix.de>,
Dinh Nguyen <dinguyen@opensource.altera.com>
Subject: [PATCHv2 2/4] ARM: socfpga: dts: add "altr,modrst-offset" property
Date: Fri, 31 Jul 2015 16:03:09 -0500 [thread overview]
Message-ID: <1438376591-22100-3-git-send-email-dinguyen@opensource.altera.com> (raw)
In-Reply-To: <1438376591-22100-1-git-send-email-dinguyen@opensource.altera.com>
From: Dinh Nguyen <dinguyen@opensource.altera.com>
The "altr,modrst-offset" property represents the offset into the reset manager
that is the first register to be used by the driver to bring peripherals out
of reset.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
Documentation/devicetree/bindings/reset/socfpga-reset.txt | 2 ++
arch/arm/boot/dts/socfpga.dtsi | 1 +
arch/arm/boot/dts/socfpga_arria10.dtsi | 1 +
3 files changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/reset/socfpga-reset.txt b/Documentation/devicetree/bindings/reset/socfpga-reset.txt
index 32c1c8b..98c9f56 100644
--- a/Documentation/devicetree/bindings/reset/socfpga-reset.txt
+++ b/Documentation/devicetree/bindings/reset/socfpga-reset.txt
@@ -3,6 +3,7 @@ Altera SOCFPGA Reset Manager
Required properties:
- compatible : "altr,rst-mgr"
- reg : Should contain 1 register ranges(address and length)
+- altr,modrst-offset : Should contain the offset of the first modrst register.
- #reset-cells: 1
Example:
@@ -10,4 +11,5 @@ Example:
#reset-cells = <1>;
compatible = "altr,rst-mgr";
reg = <0xffd05000 0x1000>;
+ altr,modrst-offset = <0x10>;
};
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 86e0fb6..0bda96a 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -783,6 +783,7 @@
#reset-cells = <1>;
compatible = "altr,rst-mgr";
reg = <0xffd05000 0x1000>;
+ altr,modrst-offset = <0x10>;
};
usbphy0: usbphy@0 {
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index a252905..22e7d82 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -593,6 +593,7 @@
#reset-cells = <1>;
compatible = "altr,rst-mgr";
reg = <0xffd05000 0x100>;
+ altr,modrst-offset = <0x20>;
};
scu: snoop-control-unit@ffffc000 {
--
2.4.5
next prev parent reply other threads:[~2015-07-31 21:11 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-31 21:03 [PATCHv2 0/4] reset: socfpga: Add reset driver support for Arria10 platform dinguyen
2015-07-31 21:03 ` [PATCHv2 1/4] dt-bindings: Add reset manager offsets for Arria10 dinguyen
2015-07-31 21:03 ` dinguyen [this message]
2015-07-31 21:03 ` [PATCHv2 3/4] reset: socfpga: Update reset-socfpga to read the altr,modrst-offset property dinguyen
2015-08-03 11:16 ` Philipp Zabel
2015-07-31 21:03 ` [PATCHv2 4/4] ARM: socfpga: dts: Add resets for EMACs on Arria10 dinguyen
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