From: Xiao Guangrong <guangrong.xiao@linux.intel.com>
To: pbonzini@redhat.com
Cc: gleb@kernel.org, mtosatti@redhat.com, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, ru.pchel@gmail.com,
Xiao Guangrong <guangrong.xiao@linux.intel.com>
Subject: [PATCH v2 7/9] KVM: MMU: introduce is_shadow_zero_bits_set()
Date: Wed, 5 Aug 2015 12:04:25 +0800 [thread overview]
Message-ID: <1438747467-25425-8-git-send-email-guangrong.xiao@linux.intel.com> (raw)
In-Reply-To: <1438747467-25425-1-git-send-email-guangrong.xiao@linux.intel.com>
We have the same data struct to check reserved bits on guest page tables
and shadow page tables, split is_rsvd_bits_set() so that the logic can be
shared between these two paths
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
---
arch/x86/kvm/mmu.c | 28 +++++++++++++++++++---------
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index edf1ec5..e6a7ed0 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -3268,6 +3268,25 @@ static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception);
}
+static bool
+__is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, u64 pte, int level)
+{
+ int bit7 = (pte >> 7) & 1, low6 = pte & 0x3f;
+
+ return (pte & rsvd_check->rsvd_bits_mask[bit7][level-1]) |
+ ((rsvd_check->bad_mt_xwr & (1ull << low6)) != 0);
+}
+
+static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level)
+{
+ return __is_rsvd_bits_set(&mmu->guest_rsvd_check, gpte, level);
+}
+
+static bool is_shadow_zero_bits_set(struct kvm_mmu *mmu, u64 spte, int level)
+{
+ return __is_rsvd_bits_set(&mmu->shadow_zero_check, spte, level);
+}
+
static bool quickly_check_mmio_pf(struct kvm_vcpu *vcpu, u64 addr, bool direct)
{
if (direct)
@@ -3546,15 +3565,6 @@ static inline bool is_last_gpte(struct kvm_mmu *mmu, unsigned level, unsigned gp
return mmu->last_pte_bitmap & (1 << index);
}
-static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level)
-{
- struct rsvd_bits_validate *rsvd_check = &mmu->guest_rsvd_check;
- int bit7 = (gpte >> 7) & 1, low6 = gpte & 0x3f;
-
- return (gpte & rsvd_check->rsvd_bits_mask[bit7][level-1]) |
- ((rsvd_check->bad_mt_xwr & (1ull << low6)) != 0);
-}
-
#define PTTYPE_EPT 18 /* arbitrary */
#define PTTYPE PTTYPE_EPT
#include "paging_tmpl.h"
--
2.1.0
next prev parent reply other threads:[~2015-08-05 4:10 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-05 4:04 [PATCH v2 0/9] KVM: MMU: fix and improve validation of mmio page fault Xiao Guangrong
2015-08-05 4:04 ` [PATCH v2 1/9] KVM: MMU: fix " Xiao Guangrong
2015-08-05 4:04 ` [PATCH v2 2/9] KVM: MMU: move FNAME(is_rsvd_bits_set) to mmu.c Xiao Guangrong
2015-08-05 4:04 ` [PATCH v2 3/9] KVM: MMU: introduce rsvd_bits_validate Xiao Guangrong
2015-08-05 4:04 ` [PATCH v2 4/9] KVM: MMU: split reset_rsvds_bits_mask Xiao Guangrong
2015-08-05 4:04 ` [PATCH v2 5/9] KVM: MMU: split reset_rsvds_bits_mask_ept Xiao Guangrong
2015-08-05 4:04 ` [PATCH v2 6/9] KVM: MMU: introduce the framework to check zero bits on sptes Xiao Guangrong
2015-08-05 4:04 ` Xiao Guangrong [this message]
2015-08-05 4:04 ` [PATCH v2 8/9] KVM: MMU: fully check zero bits for sptes Xiao Guangrong
2015-08-05 10:12 ` Paolo Bonzini
2015-08-06 2:53 ` Xiao Guangrong
2015-08-05 4:04 ` [PATCH v2 9/9] KVM: VMX: drop ept misconfig check Xiao Guangrong
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