From: Hai Li <hali@codeaurora.org>
To: dri-devel@lists.freedesktop.org
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
robdclark@gmail.com, Hai Li <hali@codeaurora.org>
Subject: [PATCH 1/5] drm/msm/dsi: Update generated header file for DSI PHY
Date: Thu, 13 Aug 2015 17:45:49 -0400 [thread overview]
Message-ID: <1439502353-7681-2-git-send-email-hali@codeaurora.org> (raw)
In-Reply-To: <1439502353-7681-1-git-send-email-hali@codeaurora.org>
This change is to update DSI register definition changes
introduced by the following change:
rnndb/dsi: Add more bits for DSI PHY
More registers and bit fields are added for PHY timings
and bitclk source selection.
Signed-off-by: Hai Li <hali@codeaurora.org>
---
drivers/gpu/drm/msm/dsi/dsi.xml.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h b/drivers/gpu/drm/msm/dsi/dsi.xml.h
index 0af0981..41c6376 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.xml.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.xml.h
@@ -440,6 +440,9 @@ static inline uint32_t DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL(enum dsi_lane_swap val)
#define REG_DSI_PHY_RESET 0x00000128
#define DSI_PHY_RESET_RESET 0x00000001
+#define REG_DSI_T_CLK_PRE_EXTEND 0x0000017c
+#define DSI_T_CLK_PRE_EXTEND_INC_BY_2_BYTECLK 0x00000001
+
#define REG_DSI_RDBK_DATA_CTRL 0x000001d0
#define DSI_RDBK_DATA_CTRL_COUNT__MASK 0x00ff0000
#define DSI_RDBK_DATA_CTRL_COUNT__SHIFT 16
@@ -835,6 +838,7 @@ static inline uint32_t DSI_28nm_PHY_TIMING_CTRL_11_TRIG3_CMD(uint32_t val)
#define REG_DSI_28nm_PHY_BIST_CTRL_5 0x000001c8
#define REG_DSI_28nm_PHY_GLBL_TEST_CTRL 0x000001d4
+#define DSI_28nm_PHY_GLBL_TEST_CTRL_BITCLK_HS_SEL 0x00000001
#define REG_DSI_28nm_PHY_LDO_CNTRL 0x000001dc
@@ -1161,6 +1165,7 @@ static inline uint32_t DSI_20nm_PHY_TIMING_CTRL_11_TRIG3_CMD(uint32_t val)
#define REG_DSI_20nm_PHY_BIST_CTRL_5 0x000001c8
#define REG_DSI_20nm_PHY_GLBL_TEST_CTRL 0x000001d4
+#define DSI_20nm_PHY_GLBL_TEST_CTRL_BITCLK_HS_SEL 0x00000001
#define REG_DSI_20nm_PHY_LDO_CNTRL 0x000001dc
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
next prev parent reply other threads:[~2015-08-13 21:46 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-13 21:45 [PATCH 0/5] drm/msm/dsi: Split different types of PHY drivers Hai Li
2015-08-13 21:45 ` Hai Li [this message]
2015-08-13 21:45 ` [PATCH 2/5] drm/msm/dsi: Specify bitmask to set source PLL Hai Li
2015-08-13 21:45 ` [PATCH 3/5] drm/msm/dsi: Return void from msm_dsi_phy_disable() Hai Li
2015-08-13 21:45 ` [PATCH 4/5] drm/msm/dsi: Split PHY drivers to separate files Hai Li
2015-08-13 21:45 ` [PATCH 5/5] drm/msm/dsi: Make each PHY type compilation independent Hai Li
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