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From: Stephane Viau <sviau@codeaurora.org>
To: dri-devel@lists.freedesktop.org
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
        robdclark@gmail.com, Stephane Viau <sviau@codeaurora.org>
Subject: [PATCH] rnndb: Add Pixel Extension registers
Date: Tue, 15 Sep 2015 08:45:44 -0400
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Pixel Extension are extra pixels fed to the QSEED2 scalar; this
information is needed to produce an output image. These values
depend on various parameters, such as scalar type, initial phase,
phase step, etc.

Pixel extension values used to be handled and calculated by
hardware; however, software could also overwrite those values for
optimization.

In some hardware (eg: MDP5 v1.7), software *must* program those
values since they are not handled in hardware.

Change-Id: I4900165e770f8da702a4f938044616daf5aa81af
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
---
 rnndb/mdp/mdp5.xml       | 24 ++++++++++++++++++++++++
 rnndb/mdp/mdp_common.xml |  7 +++++++
 2 files changed, 31 insertions(+)

diff --git a/rnndb/mdp/mdp5.xml b/rnndb/mdp/mdp5.xml
index df02377..c829737 100644
--- a/rnndb/mdp/mdp5.xml
+++ b/rnndb/mdp/mdp5.xml
@@ -390,6 +390,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 			<bitfield name="IGC_ROM_1" pos="18" type="boolean"/>
 			<bitfield name="DEINTERLACE" pos="22" type="boolean"/>
 			<bitfield name="DEINTERLACE_ODD" pos="23" type="boolean"/>
+			<bitfield name="SW_PIX_EXT_OVERRIDE" pos="31" type="boolean"/>
 		</reg32>
 		<reg32 offset="0x03c" name="SRC_CONSTANT_COLOR"/>
 		<reg32 offset="0x048" name="FETCH_CONFIG"/>
@@ -406,6 +407,29 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 			<bitfield name="VERT" low="0" high="7" type="uint"/>
 			<bitfield name="HORZ" low="8" high="15" type="uint"/>
 		</reg32>
+		<array offsets="0x100,0x110,0x120" name="SW_PIX_EXT" length="3" stride="0x10" index="mdp_component_type">
+			<!--
+				Notes:
+				o These value only take effect if SW_PIX_EXT_OVERRIDE is set in SRC_OP_MODE register
+				o For signed values (int): + indicates overfetch, - indicates line drop
+			-->
+                        <reg32 offset="0x00" name="LR">
+				<bitfield name="LEFT_RPT" low="0" high="7" type="uint"/>
+				<bitfield name="LEFT_OVF" low="8" high="15" type="int"/>
+				<bitfield name="RIGHT_RPT" low="16" high="23" type="uint"/>
+				<bitfield name="RIGHT_OVF" low="24" high="31" type="int"/>
+			</reg32>
+			<reg32 offset="0x04" name="TB">
+				<bitfield name="TOP_RPT" low="0" high="7" type="uint"/>
+				<bitfield name="TOP_OVF" low="8" high="15" type="int"/>
+				<bitfield name="BOTTOM_RPT" low="16" high="23" type="uint"/>
+				<bitfield name="BOTTOM_OVF" low="24" high="31" type="int"/>
+			</reg32>
+			<reg32 offset="0x08" name="REQ_PIXELS">
+				<bitfield name="LEFT_RIGHT" low="0" high="15" type="uint"/>
+				<bitfield name="TOP_BOTTOM" low="16" high="31" type="uint"/>
+			</reg32>
+		</array>
 		<reg32 offset="0x204" name="SCALE_CONFIG">
 			<bitfield name="SCALEX_EN" pos="0" type="boolean"/>
 			<bitfield name="SCALEY_EN" pos="1" type="boolean"/>
diff --git a/rnndb/mdp/mdp_common.xml b/rnndb/mdp/mdp_common.xml
index 5e8e421..226596a 100644
--- a/rnndb/mdp/mdp_common.xml
+++ b/rnndb/mdp/mdp_common.xml
@@ -39,6 +39,13 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 	<value name="BG_PIXEL" value="3"/>
 </enum>
 
+<enum name="mdp_component_type">
+        <value name="COMP_0" value="0"/>	<!-- Y component -->
+        <value name="COMP_1_2" value="1"/>	<!-- Cb/Cr comp. -->
+        <value name="COMP_3" value="2"/>	<!-- Trans comp. -->
+        <value name="COMP_MAX" value="3"/>
+</enum>
+
 <enum name="mdp_bpc">
 	<brief>bits per component (non-alpha channel)</brief>
 	<value name="BPC1" value="0"/> <!-- 1 bit -->
-- 
Qualcomm Innovation Center, Inc.

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