From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751266AbbJBUPh (ORCPT ); Fri, 2 Oct 2015 16:15:37 -0400 Received: from e33.co.us.ibm.com ([32.97.110.151]:60744 "EHLO e33.co.us.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751031AbbJBUPg (ORCPT ); Fri, 2 Oct 2015 16:15:36 -0400 X-IBM-Helo: d03dlp02.boulder.ibm.com X-IBM-MailFrom: bergner@vnet.ibm.com X-IBM-RcptTo: linux-kernel@vger.kernel.org Subject: Re: Missing operand for tlbie instruction on Power7 From: Peter Bergner To: Denis Kirjanov Cc: Laura Abbott , Paul Mackerras , "linuxppc-dev@lists.ozlabs.org" , Linux Kernel Mailing List In-Reply-To: References: <560EA623.1040300@redhat.com> Content-Type: text/plain; charset="UTF-8" Date: Fri, 02 Oct 2015 15:15:30 -0500 Message-ID: <1443816930.13186.214.camel@otta> Mime-Version: 1.0 X-Mailer: Evolution 2.32.3 (2.32.3-30.el6) Content-Transfer-Encoding: 7bit X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15100220-0009-0000-0000-00000E8AAEBB Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 2015-10-02 at 22:03 +0300, Denis Kirjanov wrote: > arch/powerpc/kernel/swsusp_asm64.S: Assembler messages: >> arch/powerpc/kernel/swsusp_asm64.S:188: Error: missing operand >> scripts/Makefile.build:294: recipe for target >> 'arch/powerpc/kernel/swsusp_asm64.o' failed >> make[1]: *** [arch/powerpc/kernel/swsusp_asm64.o] Error 1 >> Makefile:941: recipe for target 'arch/powerpc/kernel' failed >> make: *** [arch/powerpc/kernel] Error 2 [snip] >> I don't know enough ppc assembly to properly fix this but I can test. > > Could you please test the patch attached? [snip] > -0: tlbie r4; \ > +0: tlbie r4, 0; \ This isn't correct. With POWER7 and later (which this compile is, since it's on LE), the tlbie instruction takes two register operands: tlbie RB, RS The tlbie instruction on pre POWER7 cpus had one required register operand (RB) and an optional second L operand, where if you omitted it, it was the same as using "0": tlbie RB, L This is a POWER7 and later build, so your change which adds the "0" above is really adding r0 for RS. The new tlbie instruction doesn't treat r0 specially, so you'll be using whatever random bits which happen to be in r0 which I don't think that is what you want. Peter