From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932639AbbJUUT4 (ORCPT ); Wed, 21 Oct 2015 16:19:56 -0400 Received: from mga14.intel.com ([192.55.52.115]:64395 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756214AbbJUUOz (ORCPT ); Wed, 21 Oct 2015 16:14:55 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,178,1444719600"; d="scan'208";a="669047634" From: Andi Kleen To: x86@kernel.org Cc: rostedt@goodmis.org, peterz@infradead.org, linux-kernel@vger.kernel.org Subject: Adding MSR trace points, new edition Date: Wed, 21 Oct 2015 13:14:34 -0700 Message-Id: <1445458478-16716-1-git-send-email-andi@firstfloor.org> X-Mailer: git-send-email 2.4.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [v2: Move trace header into architecture specific include] For debugging perf it's very useful to trace CPU MSR read / writes. perf has a hackish way to do it, but it does not support reads, requires hacking a header file, and cannot be used with triggers. MSR accesses are inlined, which makes it difficult to directly add trace points to them. I posted a patch some time ago that moved them out of line to make it possible to trace them. Steven proposed a different approach of open coding the trace point static key access. This patchkit implements the different approach. To avoid include loops, it required some changes in the trace point and in the x86 headers. These can be considered cleanups in thri own. This is implemented in the first two patches. Then the later patch adds the actual trace points, and a pretty printing script for them, and then finally removes the old hackish perf MSR tracing.