[PATCH 3/4] x86,asm: Re-work smp_store_mb()

[Davidlohr Bueso <dave@stgolabs.net>]

With the exception of the recent rename of set_mb to smp_store_mb,
thus explicitly enforcing SMP ordering, the code is quite stale -
going back to 2002, afaict. Specifically, replace the implicit
barriers of xchg for more standard smp_mb() call instead. Thus,

(i) We need not re-define it for SMP and UP systems. The later
already converts the smp_mb() to a compiler barrier.

(ii) Like most other archs, avoid using ugly/hacky (void)xchg
patterns and simply add the smp_mb() call explicitly after the
assignment.

Note that this might affect callers that could/would rely on the
atomicity semantics, but there are no guarantees of that for
smp_store_mb() mentioned anywhere, plus most archs use this anyway.
Thus we continue to be consistent with the memory-barriers.txt file,
and more importantly, maintain the semantics of the smp_ nature.

Cc: x86@kernel.org
Signed-off-by: Davidlohr Bueso <dbueso@suse.de>
---
 arch/x86/include/asm/barrier.h | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h
index 0681d25..09f817a 100644
--- a/arch/x86/include/asm/barrier.h
+++ b/arch/x86/include/asm/barrier.h
@@ -35,14 +35,18 @@
 #define smp_mb()	mb()
 #define smp_rmb()	dma_rmb()
 #define smp_wmb()	barrier()
-#define smp_store_mb(var, value) do { (void)xchg(&var, value); } while (0)
 #else /* !SMP */
 #define smp_mb()	barrier()
 #define smp_rmb()	barrier()
 #define smp_wmb()	barrier()
-#define smp_store_mb(var, value) do { WRITE_ONCE(var, value); barrier(); } while (0)
 #endif /* SMP */
 
+#define smp_store_mb(var, val)						\
+do {									\
+	WRITE_ONCE(var, val);						\
+	smp_mb();							\
+} while (0)
+
 #define read_barrier_depends()		do { } while (0)
 #define smp_read_barrier_depends()	do { } while (0)
 
-- 
2.1.4