From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932106AbbLBV25 (ORCPT ); Wed, 2 Dec 2015 16:28:57 -0500 Received: from mout.kundenserver.de ([212.227.126.187]:59946 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756604AbbLBV17 (ORCPT ); Wed, 2 Dec 2015 16:27:59 -0500 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Cc: Andrew Lunn , Russell King , Jason Cooper , linux-kernel@vger.kernel.org, Gregory Clement , Sebastian Hesselbarth , Arnd Bergmann Subject: [PATCH 2/7] ARM: orion: always use MULTI_IRQ_HANDLER Date: Wed, 2 Dec 2015 22:27:04 +0100 Message-Id: <1449091629-2155735-3-git-send-email-arnd@arndb.de> X-Mailer: git-send-email 2.1.0.rc2 In-Reply-To: <1449091629-2155735-1-git-send-email-arnd@arndb.de> References: <1449091629-2155735-1-git-send-email-arnd@arndb.de> X-Provags-ID: V03:K0:TzXC9BwzPdxKks7CHYvaExUS3My0ZdY/hpbnqJz3ivrC1ZlGolT gUwn8ZDMPZAKHIM5VAmnw50PpkCTkGwBoaROJAAqSwpxQvkUhlkl8iBfQbHkj+dwO9n9OHL jByYD6xBhYm7PiHTFw8YpxfVQpP3dzU+5k3ThqISNQMXx3ODs8rC7fad9vWjtwrJjRJVnOF vk/AJVJN7tCvrlEJvm7dw== X-UI-Out-Filterresults: notjunk:1;V01:K0:y51ti+2VqaM=:lvhmeLljp3VGlJ194BhkBs mz+4aGMQEFisH8bVpN/BEfhQ4hyPre45tLeTe+DtWpBLb4LQQqcN+N2jQN2yKo2xc4qsLeN0G L/XajBY1oAuvr4qSiTZZPIjf3ksn0blqaeUSuajQnQBFV7I3sxT56g8kJXBsHzvpfFmGKJHhK FzWssw8poZiR3uJ5MIQ4dtBwN5rvy4SqwguxCbijuFOt1L4MmDl9QbMSTL6zk8AVw5tlFdQ1p gs9TKiO21r653zI5CtRiy3oUMUkfPrejGcGKhVIPSCwCh/P6hHk1T4DR+rUjDKYItgScCbPIe 8asE7u2wEfNnIdZsNmAjDljaq1C4A/e/berDowPQabYU1txuPZQxNpdWNj65tSrpjFjKgrE1k X4VOfGFuNkIxqeSPM0Q5uf5lxaKPWMIeMeMAc6Ex3wWX4Xvq3+WvNBofO7AQMytdjex7W8TeU AVlWY1rvgjPTwh3m0edLrmGufl4aQiMDQFSehfMQ5ZOrpamhZgo/Wb43e8BpHlybTNIGtEj2T RifN6sQFHzvZ6ZAJagrJ2PgN0qXh0sr21opwQC4R5+0FgKz8CzbbTk3sSsqQgZ5yV8ckk3/33 X661hxp7s6VuP7vAThhrAN8AdH7SY00AbqURf2ASktFXCeeYVl7Qtx7GiqPzlyYEm6umj2Ohp Vwz97loCIuuYt5v3LhSKmMRibg2GdBjzQkH8Mlk7PoIZecHyiJr0szEOjgArWm3TJ5iA= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As a preparation for multiplatform support, this enables the MULTI_IRQ_HANDLER code unconditionally on dove and orion5x, and introduces the respective code on mv78xx0, which did not have it so far. The classic entry-macro.S files are removed as they are now obsolete. Signed-off-by: Arnd Bergmann Acked-by: Andrew Lunn --- arch/arm/Kconfig | 3 ++ arch/arm/mach-dove/include/mach/entry-macro.S | 33 ------------------- arch/arm/mach-dove/irq.c | 12 +------ arch/arm/mach-mv78xx0/include/mach/entry-macro.S | 41 ------------------------ arch/arm/mach-mv78xx0/irq.c | 33 +++++++++++++++++++ arch/arm/mach-orion5x/include/mach/entry-macro.S | 25 --------------- arch/arm/mach-orion5x/irq.c | 11 ------- arch/arm/plat-orion/irq.c | 1 - arch/arm/plat-orion/mpp.c | 1 - 9 files changed, 37 insertions(+), 123 deletions(-) delete mode 100644 arch/arm/mach-dove/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-mv78xx0/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-orion5x/include/mach/entry-macro.S diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 34e1569a11ee..227ff489a080 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -512,6 +512,7 @@ config ARCH_DOVE select CPU_PJ4 select GENERIC_CLOCKEVENTS select MIGHT_HAVE_PCI + select MULTI_IRQ_HANDLER select MVEBU_MBUS select PINCTRL select PINCTRL_DOVE @@ -525,6 +526,7 @@ config ARCH_MV78XX0 select CPU_FEROCEON select GENERIC_CLOCKEVENTS select MVEBU_MBUS + select MULTI_IRQ_HANDLER select PCI select PLAT_ORION_LEGACY help @@ -538,6 +540,7 @@ config ARCH_ORION5X select CPU_FEROCEON select GENERIC_CLOCKEVENTS select MVEBU_MBUS + select MULTI_IRQ_HANDLER select PCI select PLAT_ORION_LEGACY select MULTI_IRQ_HANDLER diff --git a/arch/arm/mach-dove/include/mach/entry-macro.S b/arch/arm/mach-dove/include/mach/entry-macro.S deleted file mode 100644 index df1d44bdc375..000000000000 --- a/arch/arm/mach-dove/include/mach/entry-macro.S +++ /dev/null @@ -1,33 +0,0 @@ -/* - * arch/arm/mach-dove/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Marvell Dove platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IRQ_VIRT_BASE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ check low interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] - ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] - mov \irqnr, #32 - ands \irqstat, \irqstat, \tmp - - @ if no low interrupts set, check high interrupts - ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] - ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF] - moveq \irqnr, #64 - andeqs \irqstat, \irqstat, \tmp - - @ find first active interrupt source - clzne \irqstat, \irqstat - subne \irqnr, \irqnr, \irqstat - .endm diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c index bfb3703357c5..b1c7cae1486b 100644 --- a/arch/arm/mach-dove/irq.c +++ b/arch/arm/mach-dove/irq.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -109,14 +110,6 @@ static int __initdata gpio2_irqs[4] = { 0, }; -#ifdef CONFIG_MULTI_IRQ_HANDLER -/* - * Compiling with both non-DT and DT support enabled, will - * break asm irq handler used by non-DT boards. Therefore, - * we provide a C-style irq handler even for non-DT boards, - * if MULTI_IRQ_HANDLER is set. - */ - static void __iomem *dove_irq_base = IRQ_VIRT_BASE; static asmlinkage void @@ -139,7 +132,6 @@ __exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs) return; } } -#endif void __init dove_init_irq(void) { @@ -148,9 +140,7 @@ void __init dove_init_irq(void) orion_irq_init(1, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF); orion_irq_init(33, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF); -#ifdef CONFIG_MULTI_IRQ_HANDLER set_handle_irq(dove_legacy_handle_irq); -#endif /* * Initialize gpiolib for GPIOs 0-71. diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S deleted file mode 100644 index 6b1f088e0597..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S +++ /dev/null @@ -1,41 +0,0 @@ -/* - * arch/arm/mach-mv78xx0/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Marvell MV78xx0 platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IRQ_VIRT_BASE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ check low interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] - ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] - mov \irqnr, #31 - ands \irqstat, \irqstat, \tmp - bne 1001f - - @ if no low interrupts set, check high interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] - ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF] - mov \irqnr, #63 - ands \irqstat, \irqstat, \tmp - bne 1001f - - @ if no high interrupts set, check error interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_ERR_OFF] - ldr \tmp, [\base, #IRQ_MASK_ERR_OFF] - mov \irqnr, #95 - ands \irqstat, \irqstat, \tmp - - @ find first active interrupt source -1001: clzne \irqstat, \irqstat - subne \irqnr, \irqnr, \irqstat - .endm diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c index 32073444024b..2453c33faccf 100644 --- a/arch/arm/mach-mv78xx0/irq.c +++ b/arch/arm/mach-mv78xx0/irq.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -23,12 +24,44 @@ static int __initdata gpio0_irqs[4] = { IRQ_MV78XX0_GPIO_24_31, }; +static void __iomem *mv78xx0_irq_base = IRQ_VIRT_BASE; + +static asmlinkage void +__exception_irq_entry mv78xx0_legacy_handle_irq(struct pt_regs *regs) +{ + u32 stat; + + stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_LOW_OFF); + stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_LOW_OFF); + if (stat) { + unsigned int hwirq = __fls(stat); + handle_IRQ(hwirq, regs); + return; + } + stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_HIGH_OFF); + stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_HIGH_OFF); + if (stat) { + unsigned int hwirq = 32 + __fls(stat); + handle_IRQ(hwirq, regs); + return; + } + stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_ERR_OFF); + stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_ERR_OFF); + if (stat) { + unsigned int hwirq = 64 + __fls(stat); + handle_IRQ(hwirq, regs); + return; + } +} + void __init mv78xx0_init_irq(void) { orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF); orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF); orion_irq_init(64, IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF); + set_handle_irq(mv78xx0_legacy_handle_irq); + /* * Initialize gpiolib for GPIOs 0-31. (The GPIO interrupt mask * registers for core #1 are at an offset of 0x18 from those of diff --git a/arch/arm/mach-orion5x/include/mach/entry-macro.S b/arch/arm/mach-orion5x/include/mach/entry-macro.S deleted file mode 100644 index 73919a36b577..000000000000 --- a/arch/arm/mach-orion5x/include/mach/entry-macro.S +++ /dev/null @@ -1,25 +0,0 @@ -/* - * arch/arm/mach-orion5x/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Orion platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include - - .macro get_irqnr_preamble, base, tmp - ldr \base, =MAIN_IRQ_CAUSE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base, #0] @ main cause - ldr \tmp, [\base, #(MAIN_IRQ_MASK - MAIN_IRQ_CAUSE)] @ main mask - mov \irqnr, #0 @ default irqnr - @ find cause bits that are unmasked - ands \irqstat, \irqstat, \tmp @ clear Z flag if any - clzne \irqnr, \irqstat @ calc irqnr - rsbne \irqnr, \irqnr, #32 - .endm diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c index 086ecb87d885..8678db1eb1bd 100644 --- a/arch/arm/mach-orion5x/irq.c +++ b/arch/arm/mach-orion5x/irq.c @@ -26,14 +26,6 @@ static int __initdata gpio0_irqs[4] = { IRQ_ORION5X_GPIO_24_31, }; -#ifdef CONFIG_MULTI_IRQ_HANDLER -/* - * Compiling with both non-DT and DT support enabled, will - * break asm irq handler used by non-DT boards. Therefore, - * we provide a C-style irq handler even for non-DT boards, - * if MULTI_IRQ_HANDLER is set. - */ - asmlinkage void __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs) { @@ -47,15 +39,12 @@ __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs) return; } } -#endif void __init orion5x_init_irq(void) { orion_irq_init(1, MAIN_IRQ_MASK); -#ifdef CONFIG_MULTI_IRQ_HANDLER set_handle_irq(orion5x_legacy_handle_irq); -#endif /* * Initialize gpiolib for GPIOs 0-31. diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c index 8c1fc06007c0..5b63b28b00ac 100644 --- a/arch/arm/plat-orion/irq.c +++ b/arch/arm/plat-orion/irq.c @@ -18,7 +18,6 @@ #include #include #include -#include void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) { diff --git a/arch/arm/plat-orion/mpp.c b/arch/arm/plat-orion/mpp.c index 7310bcfb299f..5b4ff9373c89 100644 --- a/arch/arm/plat-orion/mpp.c +++ b/arch/arm/plat-orion/mpp.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include -- 2.1.0.rc2