From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753126AbcADEcL (ORCPT ); Sun, 3 Jan 2016 23:32:11 -0500 Received: from arroyo.ext.ti.com ([192.94.94.40]:47689 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752766AbcADE21 (ORCPT ); Sun, 3 Jan 2016 23:28:27 -0500 From: Milo Kim To: CC: , , , , , , , Milo Kim Subject: [PATCH 05/19] irqchip: atmel-aic: use simple constant to get number of interrupts per chip Date: Mon, 4 Jan 2016 13:28:29 +0900 Message-ID: <1451881723-2478-6-git-send-email-milo.kim@ti.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1451881723-2478-1-git-send-email-milo.kim@ti.com> References: <1451881723-2478-1-git-send-email-milo.kim@ti.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Number of interrupts per each chip is determined when IRQ controller allocates IRQ chip by calling irq_alloc_domain_generic_chips(). This number is fixed by atmel-aic-common part. The value is 32. So each AIC driver can use this value directly in IRQ chip operation. Cc: Thomas Gleixner Cc: Jason Cooper Cc: Marc Zyngier Cc: Alexandre Belloni Cc: Boris BREZILLON Cc: Ludovic Desroches Cc: Nicolas Ferre Cc: linux-kernel@vger.kernel.org Signed-off-by: Milo Kim --- drivers/irqchip/irq-atmel-aic.c | 2 +- drivers/irqchip/irq-atmel-aic5.c | 9 +++------ 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/irqchip/irq-atmel-aic.c b/drivers/irqchip/irq-atmel-aic.c index c499949..f2c0fd9 100644 --- a/drivers/irqchip/irq-atmel-aic.c +++ b/drivers/irqchip/irq-atmel-aic.c @@ -188,7 +188,7 @@ static int aic_irq_domain_xlate(struct irq_domain *d, if (ret) return ret; - idx = intspec[0] / dgc->irqs_per_chip; + idx = intspec[0] / AIC_IRQS_PER_CHIP; if (idx >= dgc->num_chips) return -EINVAL; diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c index f5848c8..50d540b 100644 --- a/drivers/irqchip/irq-atmel-aic5.c +++ b/drivers/irqchip/irq-atmel-aic5.c @@ -153,14 +153,13 @@ static int aic5_set_type(struct irq_data *d, unsigned type) static void aic5_suspend(struct irq_data *d) { struct irq_domain *domain = d->domain; - struct irq_domain_chip_generic *dgc = domain->gc; struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0); struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); int i; u32 mask; irq_gc_lock(bgc); - for (i = 0; i < dgc->irqs_per_chip; i++) { + for (i = 0; i < AIC_IRQS_PER_CHIP; i++) { mask = 1 << i; if ((mask & gc->mask_cache) == (mask & gc->wake_active)) continue; @@ -177,14 +176,13 @@ static void aic5_suspend(struct irq_data *d) static void aic5_resume(struct irq_data *d) { struct irq_domain *domain = d->domain; - struct irq_domain_chip_generic *dgc = domain->gc; struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0); struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); int i; u32 mask; irq_gc_lock(bgc); - for (i = 0; i < dgc->irqs_per_chip; i++) { + for (i = 0; i < AIC_IRQS_PER_CHIP; i++) { mask = 1 << i; if ((mask & gc->mask_cache) == (mask & gc->wake_active)) continue; @@ -201,13 +199,12 @@ static void aic5_resume(struct irq_data *d) static void aic5_pm_shutdown(struct irq_data *d) { struct irq_domain *domain = d->domain; - struct irq_domain_chip_generic *dgc = domain->gc; struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0); struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); int i; irq_gc_lock(bgc); - for (i = 0; i < dgc->irqs_per_chip; i++) { + for (i = 0; i < AIC_IRQS_PER_CHIP; i++) { irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR); irq_reg_writel(bgc, 1, AT91_AIC5_IDCR); irq_reg_writel(bgc, 1, AT91_AIC5_ICCR); -- 2.6.4