From: "Michael S. Tsirkin" <mst@redhat.com>
To: linux-kernel@vger.kernel.org,
Linus Torvalds <torvalds@linux-foundation.org>
Cc: Davidlohr Bueso <dave@stgolabs.net>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
the arch/x86 maintainers <x86@kernel.org>,
Davidlohr Bueso <dbueso@suse.de>,
"H. Peter Anvin" <hpa@zytor.com>,
virtualization <virtualization@lists.linux-foundation.org>,
Borislav Petkov <bp@alien8.de>,
Andy Lutomirski <luto@amacapital.net>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@suse.de>,
Arnd Bergmann <arnd@arndb.de>,
Andrey Konovalov <andreyknvl@google.com>,
Andy Lutomirski <luto@kernel.org>
Subject: [PATCH v3 4/4] x86: drop mfence in favor of lock+addl
Date: Wed, 13 Jan 2016 22:12:44 +0200 [thread overview]
Message-ID: <1452715911-12067-5-git-send-email-mst@redhat.com> (raw)
In-Reply-To: <1452715911-12067-1-git-send-email-mst@redhat.com>
mfence appears to be way slower than a locked instruction - let's use
lock+add unconditionally, as we always did on old 32-bit.
Just poking at SP would be the most natural, but if we
then read the value from SP, we get a false dependency
which will slow us down.
This was noted in this article:
http://shipilev.net/blog/2014/on-the-fence-with-dependencies/
And is easy to reproduce by sticking a barrier in a small non-inline
function.
So let's use a negative offset - which avoids this problem since we
build with the red zone disabled.
Update rmb/wmb on 32 bit to use the negative offset, too, for
consistency.
Suggested-by: Andy Lutomirski <luto@amacapital.net>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
arch/x86/include/asm/barrier.h | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h
index bfb28ca..9a2d257 100644
--- a/arch/x86/include/asm/barrier.h
+++ b/arch/x86/include/asm/barrier.h
@@ -11,16 +11,15 @@
*/
#ifdef CONFIG_X86_32
-#define mb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "mfence", \
- X86_FEATURE_XMM2) ::: "memory", "cc")
-#define rmb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "lfence", \
+#define mb() asm volatile("lock; addl $0,-4(%%esp)" ::: "memory", "cc")
+#define rmb() asm volatile(ALTERNATIVE("lock; addl $0,-4(%%esp)", "lfence", \
X86_FEATURE_XMM2) ::: "memory", "cc")
-#define wmb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "sfence", \
+#define wmb() asm volatile(ALTERNATIVE("lock; addl $0,-4(%%esp)", "sfence", \
X86_FEATURE_XMM2) ::: "memory", "cc")
#else
-#define mb() asm volatile("mfence":::"memory")
-#define rmb() asm volatile("lfence":::"memory")
-#define wmb() asm volatile("sfence" ::: "memory")
+#define mb() asm volatile("lock; addl $0,-4(%%rsp)" ::: "memory", "cc")
+#define rmb() asm volatile("lfence" ::: "memory")
+#define wmb() asm volatile("sfence" ::: "memory")
#endif
#ifdef CONFIG_X86_PPRO_FENCE
--
MST
next prev parent reply other threads:[~2016-01-13 20:12 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-13 20:12 [PATCH v3 0/4] x86: faster mb()+documentation tweaks Michael S. Tsirkin
2016-01-13 20:12 ` [PATCH v3 1/4] x86: add cc clobber for addl Michael S. Tsirkin
2016-01-13 20:12 ` [PATCH v3 2/4] x86: drop a comment left over from X86_OOSTORE Michael S. Tsirkin
2016-01-13 20:12 ` [PATCH v3 3/4] x86: tweak the comment about use of wmb for IO Michael S. Tsirkin
2016-01-13 20:12 ` Michael S. Tsirkin [this message]
2016-01-14 11:39 ` [PATCH v3 0/4] x86: faster mb()+documentation tweaks Borislav Petkov
2016-01-26 8:23 ` Michael S. Tsirkin
2016-01-26 8:26 ` Boris Petkov
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