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From: Mans Rullgard <mans@mansr.com>
To: Viresh Kumar <vireshk@kernel.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Vinod Koul <vinod.koul@intel.com>,
	linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org
Cc: Dan Williams <dan.j.williams@intel.com>
Subject: [PATCH 06/15] dmaengine: dw: substitute dma_read_byaddr by dma_readl_native
Date: Sun, 24 Jan 2016 19:21:53 +0000	[thread overview]
Message-ID: <1453663322-14474-7-git-send-email-mans@mansr.com> (raw)
In-Reply-To: <1453663322-14474-1-git-send-email-mans@mansr.com>

From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

Since struct dw_dma is allocated and regs member is assigned properly we can
use standard IO accessors to the DMA registers.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mans Rullgard <mans@mansr.com>
---
 drivers/dma/dw/core.c | 8 +++-----
 drivers/dma/dw/regs.h | 4 ----
 2 files changed, 3 insertions(+), 9 deletions(-)

diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index bbae43451529..140ea59ec882 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1513,7 +1513,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
 	pm_runtime_get_sync(chip->dev);
 
 	if (!pdata) {
-		dw_params = dma_read_byaddr(chip->regs, DW_PARAMS);
+		dw_params = dma_readl(dw, DW_PARAMS);
 		dev_dbg(chip->dev, "DW_PARAMS: 0x%08x\n", dw_params);
 
 		autocfg = dw_params >> DW_PARAMS_EN & 1;
@@ -1613,11 +1613,9 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
 
 		/* Hardware configuration */
 		if (autocfg) {
-			unsigned int dwc_params;
 			unsigned int r = DW_DMA_MAX_NR_CHANNELS - i - 1;
-			void __iomem *addr = chip->regs + r * sizeof(u32);
-
-			dwc_params = dma_read_byaddr(addr, DWC_PARAMS);
+			void __iomem *addr = &__dw_regs(dw)->DWC_PARAMS[r];
+			unsigned int dwc_params = dma_readl_native(addr);
 
 			dev_dbg(chip->dev, "DWC_PARAMS[%d]: 0x%08x\n", i,
 					   dwc_params);
diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h
index 4e6ec2d75863..e4b277565165 100644
--- a/drivers/dma/dw/regs.h
+++ b/drivers/dma/dw/regs.h
@@ -114,10 +114,6 @@ struct dw_dma_regs {
 #define dma_writel_native writel
 #endif
 
-/* To access the registers in early stage of probe */
-#define dma_read_byaddr(addr, name) \
-	dma_readl_native((addr) + offsetof(struct dw_dma_regs, name))
-
 /* Bitfields in DW_PARAMS */
 #define DW_PARAMS_NR_CHAN	8		/* number of channels */
 #define DW_PARAMS_NR_MASTER	11		/* number of AHB masters */
-- 
2.7.0

  parent reply	other threads:[~2016-01-24 19:25 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-24 19:21 [PATCH 00/15] dmaengine: dw: various fixes and cleanups Mans Rullgard
2016-01-24 19:21 ` [PATCH 01/15] dmaengine: dw: fix byte order of hw descriptor fields Mans Rullgard
2016-01-24 19:21 ` [PATCH 02/15] dmaengine: dw: clear LLP_[SD]_EN bits in last descriptor of a chain Mans Rullgard
2016-01-24 19:21 ` [PATCH 03/15] dmaengine: dw: rename masters to reflect actual topology Mans Rullgard
2016-01-24 20:09   ` Hans-Christian Noren Egtvedt
2016-01-24 20:19     ` Måns Rullgård
2016-01-24 20:37       ` Hans-Christian Noren Egtvedt
2016-01-24 20:57         ` Måns Rullgård
2016-01-24 22:36   ` Mark Brown
2016-01-24 22:38     ` Måns Rullgård
2016-01-25  6:03       ` Viresh Kumar
2016-01-25 12:05       ` Vinod Koul
2016-01-25 12:23       ` Mark Brown
2016-01-25  8:35     ` Andy Shevchenko
2016-01-25 12:24       ` Mark Brown
2016-01-25 14:01         ` Andy Shevchenko
2016-01-27 12:47   ` Mark Brown
2016-01-24 19:21 ` [PATCH 04/15] dmaengine: dw: set src and dst master select according to xfer direction Mans Rullgard
2016-01-24 19:21 ` [PATCH 05/15] dmaengine: dw: set LMS field in descriptors Mans Rullgard
2016-01-24 19:21 ` Mans Rullgard [this message]
2016-01-24 19:21 ` [PATCH 07/15] dmaengine: dw: revisit data_width property Mans Rullgard
2016-01-25  7:32   ` Vineet Gupta
2016-01-25  8:45     ` Andy Shevchenko
2016-01-25 10:31       ` Måns Rullgård
2016-01-25 10:36         ` Andy Shevchenko
2016-01-25  8:42   ` Andy Shevchenko
2016-01-26 21:07   ` Rob Herring
2016-01-27 12:26     ` Andy Shevchenko
2016-01-24 19:21 ` [PATCH 08/15] dmaengine: dw: define counter variables as unsigned int Mans Rullgard
2016-01-24 19:21 ` [PATCH 09/15] dmaengine: dw: keep entire platform data in struct dw_dma Mans Rullgard
2016-01-24 19:21 ` [PATCH 10/15] dmaengine: dw: pass platform data via struct dw_dma_chip Mans Rullgard
2016-01-24 19:21 ` [PATCH 11/15] dmaengine: dw: platform: use field-by-field initialization Mans Rullgard
2016-01-25  8:48   ` Andy Shevchenko
2016-01-24 19:21 ` [PATCH 12/15] dmaengine: dw: move dwc->paused to dwc->flags Mans Rullgard
2016-01-24 19:22 ` [PATCH 13/15] dmaengine: dw: move dwc->initialized " Mans Rullgard
2016-01-24 19:22 ` [PATCH 14/15] dmaengine: dw: move residue to a descriptor Mans Rullgard
2016-01-24 19:22 ` [PATCH 15/15] dmaengine: dw: set cdesc to NULL when free cyclic transfers Mans Rullgard
2016-01-25 10:37 ` [PATCH 00/15] dmaengine: dw: various fixes and cleanups Andy Shevchenko
2016-01-25 12:07 ` Vinod Koul

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