From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754009AbcAXTZJ (ORCPT ); Sun, 24 Jan 2016 14:25:09 -0500 Received: from unicorn.mansr.com ([81.2.72.234]:59263 "EHLO unicorn.mansr.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753791AbcAXTZF (ORCPT ); Sun, 24 Jan 2016 14:25:05 -0500 From: Mans Rullgard To: Viresh Kumar , Andy Shevchenko , Vinod Koul , linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org Cc: Dan Williams Subject: [PATCH 06/15] dmaengine: dw: substitute dma_read_byaddr by dma_readl_native Date: Sun, 24 Jan 2016 19:21:53 +0000 Message-Id: <1453663322-14474-7-git-send-email-mans@mansr.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1453663322-14474-1-git-send-email-mans@mansr.com> References: <1453663322-14474-1-git-send-email-mans@mansr.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Andy Shevchenko Since struct dw_dma is allocated and regs member is assigned properly we can use standard IO accessors to the DMA registers. Signed-off-by: Andy Shevchenko Signed-off-by: Mans Rullgard --- drivers/dma/dw/core.c | 8 +++----- drivers/dma/dw/regs.h | 4 ---- 2 files changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index bbae43451529..140ea59ec882 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -1513,7 +1513,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata) pm_runtime_get_sync(chip->dev); if (!pdata) { - dw_params = dma_read_byaddr(chip->regs, DW_PARAMS); + dw_params = dma_readl(dw, DW_PARAMS); dev_dbg(chip->dev, "DW_PARAMS: 0x%08x\n", dw_params); autocfg = dw_params >> DW_PARAMS_EN & 1; @@ -1613,11 +1613,9 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata) /* Hardware configuration */ if (autocfg) { - unsigned int dwc_params; unsigned int r = DW_DMA_MAX_NR_CHANNELS - i - 1; - void __iomem *addr = chip->regs + r * sizeof(u32); - - dwc_params = dma_read_byaddr(addr, DWC_PARAMS); + void __iomem *addr = &__dw_regs(dw)->DWC_PARAMS[r]; + unsigned int dwc_params = dma_readl_native(addr); dev_dbg(chip->dev, "DWC_PARAMS[%d]: 0x%08x\n", i, dwc_params); diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h index 4e6ec2d75863..e4b277565165 100644 --- a/drivers/dma/dw/regs.h +++ b/drivers/dma/dw/regs.h @@ -114,10 +114,6 @@ struct dw_dma_regs { #define dma_writel_native writel #endif -/* To access the registers in early stage of probe */ -#define dma_read_byaddr(addr, name) \ - dma_readl_native((addr) + offsetof(struct dw_dma_regs, name)) - /* Bitfields in DW_PARAMS */ #define DW_PARAMS_NR_CHAN 8 /* number of channels */ #define DW_PARAMS_NR_MASTER 11 /* number of AHB masters */ -- 2.7.0