From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754044AbcBAWjn (ORCPT ); Mon, 1 Feb 2016 17:39:43 -0500 Received: from exsmtp01.microchip.com ([198.175.253.37]:54187 "EHLO email.microchip.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751371AbcBAWjm (ORCPT ); Mon, 1 Feb 2016 17:39:42 -0500 From: Joshua Henderson To: CC: , Joshua Henderson , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Subject: [PATCH 1/2] dt/bindings: Add bindings for the PIC32 real time clock Date: Mon, 1 Feb 2016 15:43:21 -0700 Message-ID: <1454366606-10779-1-git-send-email-joshua.henderson@microchip.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Document the devicetree bindings for the real time clock found on Microchip PIC32 class devices. Signed-off-by: Joshua Henderson --- .../bindings/rtc/microchip,pic32-rtc.txt | 21 ++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/microchip,pic32-rtc.txt diff --git a/Documentation/devicetree/bindings/rtc/microchip,pic32-rtc.txt b/Documentation/devicetree/bindings/rtc/microchip,pic32-rtc.txt new file mode 100644 index 0000000..1ad3ae8 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/microchip,pic32-rtc.txt @@ -0,0 +1,21 @@ +* Microchip PIC32 Real Time Clock and Calendar + +The RTCC keeps time in hours, minutes, and seconds, and one half second. It +provides a calendar in weekday, date, month, and year. It also provides a +configurable alarm. + +Required properties: +- compatible: should be: "microchip,pic32mzda-rtc" +- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: RTC alarm/event interrupt +- clocks: clock phandle + +Example: + + rtc0: rtc@1f8c0000 { + compatible = "microchip,pic32mzda-rtc"; + reg = <0x1f8c0000 0x60>; + interrupts = <166 IRQ_TYPE_EDGE_RISING>; + clocks = <&PBCLK6>; + }; -- 1.7.9.5