From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757491AbcBJKBG (ORCPT ); Wed, 10 Feb 2016 05:01:06 -0500 Received: from mail.skyhub.de ([78.46.96.112]:59379 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757385AbcBJJzb (ORCPT ); Wed, 10 Feb 2016 04:55:31 -0500 From: Borislav Petkov To: Ingo Molnar Cc: X86 ML , LKML Subject: [PATCH 09/17] perf/x86: Move perf_event_intel_uncore.[ch] => x86/events/intel/uncore.[ch] Date: Wed, 10 Feb 2016 10:55:15 +0100 Message-Id: <1455098123-11740-10-git-send-email-bp@alien8.de> X-Mailer: git-send-email 2.3.5 In-Reply-To: <1455098123-11740-1-git-send-email-bp@alien8.de> References: <1455098123-11740-1-git-send-email-bp@alien8.de> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Borislav Petkov Signed-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Ingo Molnar Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver --- arch/x86/events/Makefile | 1 + .../{kernel/cpu/perf_event_intel_uncore.c => events/intel/uncore.c} | 2 +- .../{kernel/cpu/perf_event_intel_uncore.h => events/intel/uncore.h} | 2 +- arch/x86/kernel/cpu/Makefile | 3 +-- arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c | 2 +- arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c | 2 +- arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c | 3 +-- 7 files changed, 7 insertions(+), 8 deletions(-) rename arch/x86/{kernel/cpu/perf_event_intel_uncore.c => events/intel/uncore.c} (99%) rename arch/x86/{kernel/cpu/perf_event_intel_uncore.h => events/intel/uncore.h} (99%) diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile index f68232c4de81..aae3e530e2ee 100644 --- a/arch/x86/events/Makefile +++ b/arch/x86/events/Makefile @@ -8,3 +8,4 @@ endif obj-$(CONFIG_CPU_SUP_INTEL) += intel/core.o intel/bts.o intel/cqm.o obj-$(CONFIG_CPU_SUP_INTEL) += intel/cstate.o intel/ds.o intel/lbr.o obj-$(CONFIG_CPU_SUP_INTEL) += intel/pt.o intel/rapl.o +obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore.o diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/events/intel/uncore.c similarity index 99% rename from arch/x86/kernel/cpu/perf_event_intel_uncore.c rename to arch/x86/events/intel/uncore.c index 3bf41d413775..91a18d6c4405 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -1,4 +1,4 @@ -#include "perf_event_intel_uncore.h" +#include "uncore.h" static struct intel_uncore_type *empty_uncore[] = { NULL, }; struct intel_uncore_type **uncore_msr_uncores = empty_uncore; diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.h b/arch/x86/events/intel/uncore.h similarity index 99% rename from arch/x86/kernel/cpu/perf_event_intel_uncore.h rename to arch/x86/events/intel/uncore.h index a7086b862156..1dea2046990a 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_uncore.h +++ b/arch/x86/events/intel/uncore.h @@ -2,7 +2,7 @@ #include #include #include -#include "perf_event.h" +#include "../../kernel/cpu/perf_event.h" #define UNCORE_PMU_NAME_LEN 32 #define UNCORE_PMU_HRTIMER_INTERVAL (60LL * NSEC_PER_SEC) diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile index b06bc7f75648..14304dc68719 100644 --- a/arch/x86/kernel/cpu/Makefile +++ b/arch/x86/kernel/cpu/Makefile @@ -33,8 +33,7 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o ifdef CONFIG_PERF_EVENTS obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_p6.o perf_event_knc.o perf_event_p4.o -obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore.o \ - perf_event_intel_uncore_snb.o \ +obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore_snb.o \ perf_event_intel_uncore_snbep.o \ perf_event_intel_uncore_nhmex.o obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_msr.o diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c b/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c index 2749965afed0..d70cfe0be86a 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c @@ -1,5 +1,5 @@ /* Nehalem-EX/Westmere-EX uncore support */ -#include "perf_event_intel_uncore.h" +#include "../../events/intel/uncore.h" /* NHM-EX event control */ #define NHMEX_PMON_CTL_EV_SEL_MASK 0x000000ff diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c index 2bd030ddd0db..e0e41f55a20c 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c @@ -1,5 +1,5 @@ /* Nehalem/SandBridge/Haswell uncore support */ -#include "perf_event_intel_uncore.h" +#include "../../events/intel/uncore.h" /* Uncore IMC PCI IDs */ #define PCI_DEVICE_ID_INTEL_SNB_IMC 0x0100 diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c b/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c index 33acb884ccf1..188e18a1f224 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c @@ -1,6 +1,5 @@ /* SandyBridge-EP/IvyTown uncore support */ -#include "perf_event_intel_uncore.h" - +#include "../../events/intel/uncore.h" /* SNB-EP Box level control */ #define SNBEP_PMON_BOX_CTL_RST_CTRL (1 << 0) -- 2.3.5