From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Viresh Kumar <vireshk@kernel.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Vinod Koul <vinod.koul@intel.com>,
linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
Hans-Christian Egtvedt <egtvedt@samfundet.no>,
Tejun Heo <tj@kernel.org>, Mark Brown <broonie@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Mark Rutland <mark.rutland@arm.com>,
Vineet Gupta <vgupta@synopsys.com>
Cc: Mans Rullgard <mans@mansr.com>
Subject: [PATCH v2 12/15] dmaengine: dw: move dwc->paused to dwc->flags
Date: Mon, 22 Feb 2016 18:03:47 +0200 [thread overview]
Message-ID: <1456157030-54677-13-git-send-email-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <1456157030-54677-1-git-send-email-andriy.shevchenko@linux.intel.com>
We have already dedicated variable for flags, therefore no need to create an
additional storage for that. Convert dwc->paused to use dwc->flags.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mans Rullgard <mans@mansr.com>
---
drivers/dma/dw/core.c | 12 +++++-------
drivers/dma/dw/regs.h | 2 +-
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index e2502d4..6cc83df 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -979,7 +979,7 @@ static int dwc_pause(struct dma_chan *chan)
while (!(channel_readl(dwc, CFG_LO) & DWC_CFGL_FIFO_EMPTY) && count--)
udelay(2);
- dwc->paused = true;
+ set_bit(DW_DMA_IS_PAUSED, &dwc->flags);
spin_unlock_irqrestore(&dwc->lock, flags);
@@ -992,7 +992,7 @@ static inline void dwc_chan_resume(struct dw_dma_chan *dwc)
channel_writel(dwc, CFG_LO, cfglo & ~DWC_CFGL_CH_SUSP);
- dwc->paused = false;
+ clear_bit(DW_DMA_IS_PAUSED, &dwc->flags);
}
static int dwc_resume(struct dma_chan *chan)
@@ -1000,12 +1000,10 @@ static int dwc_resume(struct dma_chan *chan)
struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
unsigned long flags;
- if (!dwc->paused)
- return 0;
-
spin_lock_irqsave(&dwc->lock, flags);
- dwc_chan_resume(dwc);
+ if (test_bit(DW_DMA_IS_PAUSED, &dwc->flags))
+ dwc_chan_resume(dwc);
spin_unlock_irqrestore(&dwc->lock, flags);
@@ -1074,7 +1072,7 @@ dwc_tx_status(struct dma_chan *chan,
if (ret != DMA_COMPLETE)
dma_set_residue(txstate, dwc_get_residue(dwc));
- if (dwc->paused && ret == DMA_IN_PROGRESS)
+ if (test_bit(DW_DMA_IS_PAUSED, &dwc->flags) && ret == DMA_IN_PROGRESS)
return DMA_PAUSED;
return ret;
diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h
index 4424940..6355f6c 100644
--- a/drivers/dma/dw/regs.h
+++ b/drivers/dma/dw/regs.h
@@ -216,6 +216,7 @@ enum dw_dma_msize {
enum dw_dmac_flags {
DW_DMA_IS_CYCLIC = 0,
DW_DMA_IS_SOFT_LLP = 1,
+ DW_DMA_IS_PAUSED = 2,
};
struct dw_dma_chan {
@@ -224,7 +225,6 @@ struct dw_dma_chan {
u8 mask;
u8 priority;
enum dma_transfer_direction direction;
- bool paused;
bool initialized;
/* software emulation of the LLP transfers */
--
2.7.0
next prev parent reply other threads:[~2016-02-22 16:07 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-22 16:03 [PATCH v2 00/15] Fixes / cleanups in dw_dmac (affects on few subsystems) Andy Shevchenko
2016-02-22 16:03 ` [PATCH v2 01/15] dmaengine: dw: fix byte order of hw descriptor fields Andy Shevchenko
2016-02-22 16:03 ` [PATCH v2 02/15] dmaengine: dw: clear LLP_[SD]_EN bits in last descriptor of a chain Andy Shevchenko
2016-02-22 16:03 ` [PATCH v2 03/15] dmaengine: dw: rename masters to reflect actual topology Andy Shevchenko
2016-02-22 16:03 ` [PATCH v2 04/15] dmaengine: dw: set src and dst master select according to xfer direction Andy Shevchenko
2016-02-22 16:03 ` [PATCH v2 05/15] dmaengine: dw: set LMS field in descriptors Andy Shevchenko
2016-02-22 16:03 ` [PATCH v2 06/15] dmaengine: dw: substitute dma_read_byaddr by dma_readl_native Andy Shevchenko
2016-02-22 16:03 ` [PATCH v2 07/15] dmaengine: dw: revisit data_width property Andy Shevchenko
2016-02-22 16:03 ` [PATCH v2 08/15] dmaengine: dw: define counter variables as unsigned int Andy Shevchenko
2016-02-22 16:03 ` [PATCH v2 09/15] dmaengine: dw: keep entire platform data in struct dw_dma Andy Shevchenko
2016-02-22 16:03 ` [PATCH v2 10/15] dmaengine: dw: pass platform data via struct dw_dma_chip Andy Shevchenko
2016-02-22 16:03 ` [PATCH v2 11/15] dmaengine: dw: platform: use field-by-field initialization Andy Shevchenko
2016-02-22 16:03 ` Andy Shevchenko [this message]
2016-02-22 16:03 ` [PATCH v2 13/15] dmaengine: dw: move dwc->initialized to dwc->flags Andy Shevchenko
2016-02-22 16:03 ` [PATCH v2 14/15] dmaengine: dw: move residue to a descriptor Andy Shevchenko
2016-02-22 16:03 ` [PATCH v2 15/15] dmaengine: dw: set cdesc to NULL when free cyclic transfers Andy Shevchenko
2016-03-04 12:34 ` [PATCH v2 00/15] Fixes / cleanups in dw_dmac (affects on few subsystems) Andy Shevchenko
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