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From: Alexandre Courbot <acourbot@nvidia.com>
To: Ulf Hansson <ulf.hansson@linaro.org>,
	Arnd Bergmann <arnd@arndb.de>,
	Stephen Warren <swarren@wwwdotorg.org>,
	Thierry Reding <thierry.reding@gmail.com>
Cc: linux-mmc@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org, gnurou@gmail.com,
	Alexandre Courbot <acourbot@nvidia.com>
Subject: [PATCH v2 2/2] mmc: sdhci-tegra: Specify valid DMA mask
Date: Tue, 1 Mar 2016 13:32:44 +0900	[thread overview]
Message-ID: <1456806764-16467-3-git-send-email-acourbot@nvidia.com> (raw)
In-Reply-To: <1456806764-16467-1-git-send-email-acourbot@nvidia.com>

On T210, the sdhci controller can address more than 32 bits of address
space. Failing to express this fact results in the use of bounce
buffers and affects performance.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
 drivers/mmc/host/sdhci-tegra.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 83c4bf7bc16c..66808ac64db5 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -25,6 +25,7 @@
 #include <linux/mmc/mmc.h>
 #include <linux/mmc/slot-gpio.h>
 #include <linux/gpio/consumer.h>
+#include <linux/dma-mapping.h>
 
 #include "sdhci-pltfm.h"
 
@@ -52,6 +53,7 @@
 struct sdhci_tegra_soc_data {
 	const struct sdhci_pltfm_data *pdata;
 	u32 nvquirks;
+	u64 dma_mask;
 };
 
 struct sdhci_tegra {
@@ -289,6 +291,7 @@ static const struct sdhci_tegra_soc_data soc_data_tegra20 = {
 	.pdata = &sdhci_tegra20_pdata,
 	.nvquirks = NVQUIRK_FORCE_SDHCI_SPEC_200 |
 		    NVQUIRK_ENABLE_BLOCK_GAP_DET,
+	.dma_mask = DMA_BIT_MASK(32),
 };
 
 static const struct sdhci_pltfm_data sdhci_tegra30_pdata = {
@@ -307,6 +310,7 @@ static const struct sdhci_tegra_soc_data soc_data_tegra30 = {
 	.nvquirks = NVQUIRK_ENABLE_SDHCI_SPEC_300 |
 		    NVQUIRK_ENABLE_SDR50 |
 		    NVQUIRK_ENABLE_SDR104,
+	.dma_mask = DMA_BIT_MASK(32),
 };
 
 static const struct sdhci_ops tegra114_sdhci_ops = {
@@ -338,6 +342,7 @@ static const struct sdhci_tegra_soc_data soc_data_tegra114 = {
 	.nvquirks = NVQUIRK_ENABLE_SDR50 |
 		    NVQUIRK_ENABLE_DDR50 |
 		    NVQUIRK_ENABLE_SDR104,
+	.dma_mask = DMA_BIT_MASK(32),
 };
 
 static const struct sdhci_pltfm_data sdhci_tegra210_pdata = {
@@ -353,6 +358,7 @@ static const struct sdhci_pltfm_data sdhci_tegra210_pdata = {
 
 static const struct sdhci_tegra_soc_data soc_data_tegra210 = {
 	.pdata = &sdhci_tegra210_pdata,
+	.dma_mask = DMA_BIT_MASK(34),
 };
 
 static const struct of_device_id sdhci_tegra_dt_match[] = {
@@ -385,6 +391,8 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
 		return PTR_ERR(host);
 	pltfm_host = sdhci_priv(host);
 
+	host->dma_mask = soc_data->dma_mask;
+
 	tegra_host = devm_kzalloc(&pdev->dev, sizeof(*tegra_host), GFP_KERNEL);
 	if (!tegra_host) {
 		dev_err(mmc_dev(host->mmc), "failed to allocate tegra_host\n");
-- 
2.7.2

  parent reply	other threads:[~2016-03-01  4:42 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-01  4:32 [PATCH v2 0/2] mmc: sdhci: Set DMA mask if specified Alexandre Courbot
2016-03-01  4:32 ` [PATCH v2 1/2] mmc: sdhci: Set DMA mask Alexandre Courbot
2016-03-01 21:30   ` Arnd Bergmann
2016-03-04  6:09     ` Alexandre Courbot
2016-03-01  4:32 ` Alexandre Courbot [this message]
2016-03-01 21:34   ` [PATCH v2 2/2] mmc: sdhci-tegra: Specify valid " Arnd Bergmann
2016-03-02 10:36     ` Alexandre Courbot
2016-03-02 11:25       ` Arnd Bergmann
2016-03-04  6:08         ` Alexandre Courbot
2016-03-04  6:43           ` Alexandre Courbot
2016-03-04  8:38             ` Arnd Bergmann

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