From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752137AbcDTR56 (ORCPT ); Wed, 20 Apr 2016 13:57:58 -0400 Received: from mga14.intel.com ([192.55.52.115]:47097 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751302AbcDTR55 (ORCPT ); Wed, 20 Apr 2016 13:57:57 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,510,1455004800"; d="scan'208";a="788789356" Message-ID: <1461175102.8946.140.camel@linux.intel.com> Subject: Re: [PATCH] perf/x86/intel/rapl: Add missing Haswell model From: Srinivas Pandruvada To: Peter Zijlstra Cc: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, bp@alien8.de, linux-kernel@vger.kernel.org Date: Wed, 20 Apr 2016 10:58:22 -0700 In-Reply-To: <20160420153816.GD3408@twins.programming.kicks-ass.net> References: <1460907809-11897-1-git-send-email-srinivas.pandruvada@linux.intel.com> <20160420153816.GD3408@twins.programming.kicks-ass.net> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.18.5.2 (3.18.5.2-1.fc23) Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2016-04-20 at 17:38 +0200, Peter Zijlstra wrote: > On Sun, Apr 17, 2016 at 08:43:29AM -0700, Srinivas Pandruvada wrote: > > > > Added one missing Haswell model. > Indeed, but when I compare with the table in events/intel/core.c I > find > we also miss one Broadwell (86) model. > > Would the below be correct for that? Yes. Thanks, Srinivas > > --- >  arch/x86/events/intel/rapl.c | 13 +++++++++---- >  1 file changed, 9 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/events/intel/rapl.c > b/arch/x86/events/intel/rapl.c > index 7c56b985c9f6..f9129a85928a 100644 > --- a/arch/x86/events/intel/rapl.c > +++ b/arch/x86/events/intel/rapl.c > @@ -739,16 +739,21 @@ static const struct intel_rapl_init_fun > knl_rapl_init __initconst = { >   >  static const struct x86_cpu_id rapl_cpu_match[] __initconst = { >   X86_RAPL_MODEL_MATCH(42, snb_rapl_init), /* Sandy > Bridge */ > + X86_RAPL_MODEL_MATCH(45, snbep_rapl_init), /* Sandy > Bridge-EP */ > + >   X86_RAPL_MODEL_MATCH(58, snb_rapl_init), /* Ivy > Bridge */ > - X86_RAPL_MODEL_MATCH(63, hsx_rapl_init), /* Haswell- > Server */ > - X86_RAPL_MODEL_MATCH(79, hsx_rapl_init), /* > Broadwell-Server */ > + X86_RAPL_MODEL_MATCH(62, snbep_rapl_init), /* IvyTown > */ > + >   X86_RAPL_MODEL_MATCH(60, hsw_rapl_init), /* Haswell > */ > + X86_RAPL_MODEL_MATCH(63, hsx_rapl_init), /* Haswell- > Server */ >   X86_RAPL_MODEL_MATCH(69, hsw_rapl_init), /* Haswell- > Celeron */ >   X86_RAPL_MODEL_MATCH(70, hsw_rapl_init), /* Haswell > GTe3 */ > + >   X86_RAPL_MODEL_MATCH(61, hsw_rapl_init), /* Broadwell > */ >   X86_RAPL_MODEL_MATCH(71, hsw_rapl_init), /* > Broadwell-H */ > - X86_RAPL_MODEL_MATCH(45, snbep_rapl_init), /* Sandy > Bridge-EP */ > - X86_RAPL_MODEL_MATCH(62, snbep_rapl_init), /* IvyTown > */ > + X86_RAPL_MODEL_MATCH(79, hsx_rapl_init), /* > Broadwell-Server */ > + X86_RAPL_MODEL_MATCH(86, hsx_rapl_init), /* Broadwell > Xeon D */ > + >   X86_RAPL_MODEL_MATCH(87, knl_rapl_init), /* Knights > Landing */ >   {}, >  };