From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752191AbcEDOyX (ORCPT ); Wed, 4 May 2016 10:54:23 -0400 Received: from mga01.intel.com ([192.55.52.88]:6650 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750916AbcEDOyV (ORCPT ); Wed, 4 May 2016 10:54:21 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,577,1455004800"; d="scan'208";a="972509763" Message-ID: <1462373710.17131.257.camel@linux.intel.com> Subject: Re: [PATCH v3 09/11] serial: 8250_lpss: move Quark code from PCI driver From: Andy Shevchenko To: "Bryan O'Donoghue" , Andy Shevchenko Cc: Peter Hurley , "linux-serial@vger.kernel.org" , Vinod Koul , "linux-kernel@vger.kernel.org" , dmaengine , Greg Kroah-Hartman , "Puustinen, Ismo" , Heikki Krogerus Date: Wed, 04 May 2016 17:55:10 +0300 In-Reply-To: <1462372640.27858.192.camel@nexus-software.ie> References: <1461764894-14891-1-git-send-email-andriy.shevchenko@linux.intel.com> <1461764894-14891-10-git-send-email-andriy.shevchenko@linux.intel.com> <1462354262.27858.153.camel@nexus-software.ie> <1462355477.27858.161.camel@nexus-software.ie> <1462359696.27858.184.camel@nexus-software.ie> <1462360835.17131.224.camel@linux.intel.com> <1462372640.27858.192.camel@nexus-software.ie> Organization: Intel Finland Oy Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.18.5.1-1 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2016-05-04 at 15:37 +0100, Bryan O'Donoghue wrote: > On Wed, 2016-05-04 at 14:20 +0300, Andy Shevchenko wrote: > > > > On Wed, 2016-05-04 at 12:01 +0100, Bryan O'Donoghue wrote: > > > > > > On Wed, 2016-05-04 at 13:03 +0300, Andy Shevchenko wrote: > > > > > > > > > > > > On Wed, May 4, 2016 at 12:51 PM, Bryan O'Donoghue > > > > wrote: > > > > > > > > > > > > > > > The default may be set to SERIAL_8250 but, without the QRK > > > > > specific > > > > > entry in 8250_pci.c you won't get console output. > > That's, by the way, not true. > Since when ? We don't have an I/O bar so mapping the MMIO bar @ the > right register width is required. Since this series. 8250_lpss will be enabled as long as user doesn't enable EXPERT and _explicitly_ _disables_ it. Same is applied to SERIAL_8250_PCI. If you look at the default kernel configurations such as i386_default you don't find that option there. Btw, I have to clean up such in my branches. >  > > > > > So if you are going to remove the QRK entry from 8250_pci.c > > > > > and > > > > > stuff > > > > > it into 8250_lpss.c then 8250_lpss needs to be selected by > > > > > CONFIG_SERIAL_8250_PCI. > > > > Why?! > > > > > > > > Now it should be enough to have SERIAL_8250 set to non-n to have > > > > 8250_lpss compiled. > > > > Can you check it? > > > I'm sure that's true. > > > > > > My point to you is that - its a highly non-intuitive thing to do > > > on > > > a > > > reading of the datasheet for this part. > > > > > > LPSS is, ostensibly at least, for passing processor resources via > > > APCI. > > > > > > If you look at a QRK datasheet it says "enumerate all this stuff > > > via > > > PCI" - there's not a single mention of LPSS. Its reasonable, > > > correct > > > and currently required for QRK to set CONFIG_8250_PCI. > > User has no such item even visible until enable CONFIG_EXPERT. > > > > Heikki sent an answer to you (and to the list, but by some reason > > it's > > not yet there) an hour ago. > > > > > > > > > > > To move away from a valid/standard PCI probe routine into a new > > > special > > > LPSS/PCI shim (which the hardware doesn't actually mandate) I do > > > think > > > you should to setup the dependency CONFIG_8250_PCI => > > > CONFIG_8250_LPSS. > > No, this is what we try avoiding, thus it will not happen. > > > > If user selects CONFIG_SERIAL_8250_PCI, the CONFIG_SERIAL_8250_LPSS > > will > > be selected as well since it has same dependencies. > Hmm. I think what you mean to say is that a user (expert or not) > *would* select SERIAL_8250_LPSS since (at least in your branch >  09c4268121a39eb3973823dd9225b650df726f67) both options may be > individually selected/deselected. So, currently it works in such way that user enables SERIAL_8250 and _dependencies_, which are PCI (for SERIAL_8250_PCI) or PCI && X86 (for SERIAL_8250_LPSS) and drivers will be built automatically on the same level (m or y) as SERIAL_8250. Nevertheless, user may _disable_ them if needed using EXPERT option. -- Andy Shevchenko Intel Finland Oy