From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756630AbcEFBCz (ORCPT ); Thu, 5 May 2016 21:02:55 -0400 Received: from mail-pa0-f41.google.com ([209.85.220.41]:33626 "EHLO mail-pa0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754196AbcEFBCy (ORCPT ); Thu, 5 May 2016 21:02:54 -0400 From: Brian Norris To: Heiko Stuebner Cc: , , Brian Norris Subject: [PATCH] ARM: dts: rk3288: add SPI flash node for veyron Date: Thu, 5 May 2016 18:02:44 -0700 Message-Id: <1462496564-76530-1-git-send-email-computersforpeace@gmail.com> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is a standard binding for describing SPI flash that can be identified by reading their JEDEC ID. Let's use it. Tested on Veyron Jaq. Signed-off-by: Brian Norris --- arch/arm/boot/dts/rk3288-veyron.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi index 412809c60d01..28f8ba8ae500 100644 --- a/arch/arm/boot/dts/rk3288-veyron.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron.dtsi @@ -369,6 +369,12 @@ status = "okay"; rx-sample-delay-ns = <12>; + + flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <0>; + }; }; &tsadc { -- 2.8.0.rc3.226.g39d4020