From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932228AbcEKXKs (ORCPT ); Wed, 11 May 2016 19:10:48 -0400 Received: from mail-pf0-f180.google.com ([209.85.192.180]:34423 "EHLO mail-pf0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752187AbcEKXCq (ORCPT ); Wed, 11 May 2016 19:02:46 -0400 From: David Carrillo-Cisneros To: Peter Zijlstra , Alexander Shishkin , Arnaldo Carvalho de Melo , Ingo Molnar Cc: Vikas Shivappa , Matt Fleming , Tony Luck , Stephane Eranian , Paul Turner , David Carrillo-Cisneros , x86@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 04/32] perf/x86/intel/cqm: add constants for CQM Date: Wed, 11 May 2016 16:02:04 -0700 Message-Id: <1463007752-116802-5-git-send-email-davidcc@google.com> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 In-Reply-To: <1463007752-116802-1-git-send-email-davidcc@google.com> References: <1463007752-116802-1-git-send-email-davidcc@google.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add initial constants and comments. Reviewed-by: Stephane Eranian Signed-off-by: David Carrillo-Cisneros --- arch/x86/events/intel/cqm.c | 20 ++++++++++++++++++++ arch/x86/events/intel/cqm.h | 31 +++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+) create mode 100644 arch/x86/events/intel/cqm.h diff --git a/arch/x86/events/intel/cqm.c b/arch/x86/events/intel/cqm.c index e69de29..0c4f3fe 100644 --- a/arch/x86/events/intel/cqm.c +++ b/arch/x86/events/intel/cqm.c @@ -0,0 +1,20 @@ +/* + * Intel Cache Quality-of-Service Monitoring (CQM) support. + * + * Based very, very heavily on work by Peter Zijlstra. + */ + +#include +#include +#include "cqm.h" +#include "../perf_event.h" + +#define MSR_IA32_QM_CTR 0x0c8e +#define MSR_IA32_QM_EVTSEL 0x0c8d + +#define RMID_VAL_ERROR (1ULL << 63) +#define RMID_VAL_UNAVAIL (1ULL << 62) + +#define QOS_L3_OCCUP_EVENT_ID (1 << 0) + +#define QOS_EVENT_MASK QOS_L3_OCCUP_EVENT_ID diff --git a/arch/x86/events/intel/cqm.h b/arch/x86/events/intel/cqm.h new file mode 100644 index 0000000..bb906c7 --- /dev/null +++ b/arch/x86/events/intel/cqm.h @@ -0,0 +1,31 @@ +/* + * Intel Cache Quality-of-Service Monitoring (CQM) support. + * + * A Resource Manager ID (RMID) is a u32 value that, when programmed in a + * logical CPU, will allow the LLC cache to associate the changes in occupancy + * generated by that cpu (cache lines allocations - deallocations) to the RMID. + * If a RMID has been assigned to a thread T long enough for all cache lines + * used by T to be allocated, then the occupancy reported by the hardware + * equals the total cache occupancy for T. + * + * Groups of threads that are to be monitored together (such as cgroups + * or processes) can shared a RMID. + * + * This driver implements a tree hierarchy of Monitored Resources (monr). Each + * monr is a cgroup, a process or a thread that needs one single RMID. + * + * Since the number of RMIDs is relatively small to the number of potential + * monitored elements, RMIDs must be "rotated" among all monitored elements. + */ + +#include +#include +#include + +/* + * Time between execution of rotation logic. The frequency of execution does + * not affect the rate at which RMIDs are recycled, except by the delay by the + * delay updating the prmid's and their pools. + * The rotation period is stored in pmu->hrtimer_interval_ms. + */ +#define CQM_DEFAULT_ROTATION_PERIOD 1200 /* ms */ -- 2.8.0.rc3.226.g39d4020