From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754036AbcEYG3P (ORCPT ); Wed, 25 May 2016 02:29:15 -0400 Received: from mx1.redhat.com ([209.132.183.28]:55619 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753679AbcEYG3N (ORCPT ); Wed, 25 May 2016 02:29:13 -0400 From: Baoquan He To: joro@8bytes.org Cc: iommu@lists.linux-foundation.org, vincent.wan@amd.com, xlpang@redhat.com, dyoung@redhat.com, linux-kernel@vger.kernel.org, Baoquan He Subject: [Patch v4 3/9] iommu/amd: Detect pre enabled translation Date: Wed, 25 May 2016 14:28:49 +0800 Message-Id: <1464157735-8865-4-git-send-email-bhe@redhat.com> In-Reply-To: <1464157735-8865-1-git-send-email-bhe@redhat.com> References: <1464157735-8865-1-git-send-email-bhe@redhat.com> X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Wed, 25 May 2016 06:29:12 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add functions to check whether translation is already enabled in IOMMU. Signed-off-by: Baoquan He --- drivers/iommu/amd_iommu_init.c | 25 +++++++++++++++++++++++++ drivers/iommu/amd_iommu_types.h | 4 ++++ 2 files changed, 29 insertions(+) diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index 8361367d..9e1dfcb 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@ -229,6 +229,26 @@ static int amd_iommu_enable_interrupts(void); static int __init iommu_go_to_state(enum iommu_init_state state); static void init_device_table_dma(void); + +static bool translation_pre_enabled(struct amd_iommu *iommu) +{ + return (iommu->flags & AMD_IOMMU_FLAG_TRANS_PRE_ENABLED); +} + +static void clear_translation_pre_enabled(struct amd_iommu *iommu) +{ + iommu->flags &= ~AMD_IOMMU_FLAG_TRANS_PRE_ENABLED; +} + +static void init_translation_status(struct amd_iommu *iommu) +{ + u32 ctrl; + + ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET); + if (ctrl & (1<flags |= AMD_IOMMU_FLAG_TRANS_PRE_ENABLED; +} + static int iommu_pc_get_set_reg_val(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 *value, bool is_write); @@ -1101,6 +1121,11 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h) iommu->int_enabled = false; + init_translation_status(iommu); + + if (translation_pre_enabled()) + pr_warn("Translation is already enabled - trying to copy translation structures\n"); + ret = init_iommu_from_acpi(iommu, h); if (ret) return ret; diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h index 9d32b20..01783cc 100644 --- a/drivers/iommu/amd_iommu_types.h +++ b/drivers/iommu/amd_iommu_types.h @@ -384,6 +384,7 @@ extern struct kmem_cache *amd_iommu_irq_cache; #define APERTURE_PAGE_INDEX(a) (((a) >> 21) & 0x3fULL) + /* * This struct is used to pass information about * incoming PPR faults around. @@ -401,6 +402,8 @@ struct amd_iommu_fault { struct iommu_domain; struct irq_domain; +#define AMD_IOMMU_FLAG_TRANS_PRE_ENABLED (1 << 0) + /* * This structure contains generic data for IOMMU protection domains * independent of their use. @@ -525,6 +528,7 @@ struct amd_iommu { struct irq_domain *ir_domain; struct irq_domain *msi_domain; #endif + u32 flags; }; struct devid_map { -- 2.5.5