From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752195AbcF1Eec (ORCPT ); Tue, 28 Jun 2016 00:34:32 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51708 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752102AbcF1EeC (ORCPT ); Tue, 28 Jun 2016 00:34:02 -0400 From: Bandan Das To: kvm@vger.kernel.org Cc: pbonzini@redhat.com, guangrong.xiao@linux.intel.com, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] mmu: pass execonly value when initializing rsvd bits Date: Tue, 28 Jun 2016 00:32:37 -0400 Message-Id: <1467088360-10186-3-git-send-email-bsd@redhat.com> In-Reply-To: <1467088360-10186-1-git-send-email-bsd@redhat.com> References: <1467088360-10186-1-git-send-email-bsd@redhat.com> X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Tue, 28 Jun 2016 04:33:57 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In reset_tdp_shadow_zero_bits_mask, we always pass false when initializing the reserved bits. By initializing with the correct value of ept exec only, the host can correctly identify if the guest pte is valid. Note that kvm_init_shadow_ept_mmu() already knows about execonly. Signed-off-by: Bandan Das --- arch/x86/kvm/mmu.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index a50af79..875d4f7 100644 --- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c @@ -3831,23 +3831,27 @@ static inline bool boot_cpu_is_amd(void) /* * the direct page table on host, use as much mmu features as - * possible, however, kvm currently does not do execution-protection. + * possible */ static void reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context) { + bool execonly; + if (boot_cpu_is_amd()) __reset_rsvds_bits_mask(vcpu, &context->shadow_zero_check, boot_cpu_data.x86_phys_bits, context->shadow_root_level, false, boot_cpu_has(X86_FEATURE_GBPAGES), true, true); - else + else { + execonly = !(context->guest_rsvd_check.bad_mt_xwr & + (1ull << VMX_EPT_EXECUTABLE_MASK)); __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, boot_cpu_data.x86_phys_bits, - false); - + execonly); + } } /* -- 2.5.5