From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753609AbcHPNVO (ORCPT ); Tue, 16 Aug 2016 09:21:14 -0400 Received: from smtprelay.synopsys.com ([198.182.60.111]:57704 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753542AbcHPNVL (ORCPT ); Tue, 16 Aug 2016 09:21:11 -0400 From: Eugeniy Paltsev To: "andriy.shevchenko@linux.intel.com" CC: "ismo.puustinen@intel.com" , "linux-kernel@vger.kernel.org" , "vinod.koul@intel.com" , "heikki.krogerus@linux.intel.com" , "Eugeniy.Paltsev@synopsys.com" , "linux-snps-arc@lists.infradead.org" , "dmaengine@vger.kernel.org" , "linux-serial@vger.kernel.org" , "gregkh@linuxfoundation.org" , "peter@hurleysoftware.com" , "pure.logic@nexus-software.ie" Subject: Re: [PATCH v10 03/11] dmaengine: dw: override LLP support if asked in platform data Thread-Topic: [PATCH v10 03/11] dmaengine: dw: override LLP support if asked in platform data Thread-Index: AQHR9LLo1N7+gYFMXUidx5alVBIZL6BLdykA Date: Tue, 16 Aug 2016 13:21:06 +0000 Message-ID: <1471353666.1562.3.camel@synopsys.com> References: <1471017716-44893-1-git-send-email-andriy.shevchenko@linux.intel.com> <1471017716-44893-4-git-send-email-andriy.shevchenko@linux.intel.com> In-Reply-To: <1471017716-44893-4-git-send-email-andriy.shevchenko@linux.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.121.14.112] Content-Type: text/plain; charset="utf-8" Content-ID: MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id u7GDLH0S009805 On Fri, 2016-08-12 at 19:01 +0300, Andy Shevchenko wrote: > There are at least two known devices, e.g. DMA controller found on > ARC AXS101 > SDP board, that have LLP register and no multi block transfer support > at the > same time. > > Override autodetection by user provided data. > > Reported-by: Eugeniy Paltsev > Signed-off-by: Andy Shevchenko > --- >  drivers/dma/dw/core.c                | 6 +----- >  include/linux/platform_data/dma-dw.h | 2 ++ >  2 files changed, 3 insertions(+), 5 deletions(-) > > diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c > index 80e7421..da18b18 100644 > --- a/drivers/dma/dw/core.c > +++ b/drivers/dma/dw/core.c > @@ -1571,11 +1571,7 @@ int dw_dma_probe(struct dw_dma_chip *chip) >   (dwc_params >> DWC_PARAMS_MBLK_EN & > 0x1) == 0; >   } else { >   dwc->block_size = pdata->block_size; > - > - /* Check if channel supports multi block > transfer */ > - channel_writel(dwc, LLP, > DWC_LLP_LOC(0xffffffff)); > - dwc->nollp = DWC_LLP_LOC(channel_readl(dwc, > LLP)) == 0; > - channel_writel(dwc, LLP, 0); > + dwc->nollp = pdata->is_nollp; >   } >   } >   > diff --git a/include/linux/platform_data/dma-dw.h > b/include/linux/platform_data/dma-dw.h > index 4636c93..5f0e11e 100644 > --- a/include/linux/platform_data/dma-dw.h > +++ b/include/linux/platform_data/dma-dw.h > @@ -40,6 +40,7 @@ struct dw_dma_slave { >   * @is_private: The device channels should be marked as private and > not for >   * by the general purpose DMA channel allocator. >   * @is_memcpy: The device channels do support memory-to-memory > transfers. > + * @is_nollp: The device channels does not support multi block > transfers. >   * @chan_allocation_order: Allocate channels starting from 0 or 7 >   * @chan_priority: Set channel priority increasing from 0 to 7 or 7 > to 0. >   * @block_size: Maximum block size supported by the controller > @@ -51,6 +52,7 @@ struct dw_dma_platform_data { >   unsigned int nr_channels; >   bool is_private; >   bool is_memcpy; > + bool is_nollp; >  #define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven > */ >  #define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero > */ >   unsigned char chan_allocation_order; Looks good to me. Reviewed-by: Eugeniy Platsev