From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753682AbcIAXxp (ORCPT ); Thu, 1 Sep 2016 19:53:45 -0400 Received: from mail-pa0-f49.google.com ([209.85.220.49]:33037 "EHLO mail-pa0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752673AbcIAXxn (ORCPT ); Thu, 1 Sep 2016 19:53:43 -0400 From: Douglas Anderson To: Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, wxt@rock-chips.com, zhengxing@rock-chips.com, tonie.xie@rock-chips.com, Douglas Anderson , robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, briannorris@chromium.org, jay.xu@rock-chips.com, zhangqing@rock-chips.com, yamada.masahiro@socionext.com, david.wu@rock-chips.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: rockchip: Add pinctrl entry for 32k clock on rk3399 Date: Thu, 1 Sep 2016 16:53:22 -0700 Message-Id: <1472774002-25986-1-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On some rk3399 boards GPIO0_A0 is hooked up to a 32 kHz clock. This can be used as the source for various clocks in the system. Add a pinmux so boards can get this pin properly configured. Signed-off-by: Douglas Anderson --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 62d450935a57..13e2a440fe43 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1171,6 +1171,12 @@ drive-strength = <13>; }; + clock { + clk_32k: clk-32k { + rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>; + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = -- 2.8.0.rc3.226.g39d4020